From: Ansuel Smith <ansuelsmth@gmail.com>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ansuel Smith <ansuelsmth@gmail.com>, Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Russell King <linux@armlinux.org.uk>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [RFC PATCH net-next v4 09/28] net: dsa: qca8k: handle error with qca8k_write operation
Date: Sat, 8 May 2021 02:28:59 +0200 [thread overview]
Message-ID: <20210508002920.19945-9-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20210508002920.19945-1-ansuelsmth@gmail.com>
qca8k_write can fail. Rework any user to handle error values and
correctly return.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
drivers/net/dsa/qca8k.c | 103 ++++++++++++++++++++++++++--------------
1 file changed, 68 insertions(+), 35 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 5087ee8ecebb..0ec95ef16143 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -168,7 +168,7 @@ qca8k_read(struct qca8k_priv *priv, u32 reg)
return val;
}
-static void
+static int
qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val)
{
struct mii_bus *bus = priv->bus;
@@ -187,6 +187,7 @@ qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val)
exit:
mutex_unlock(&bus->mdio_lock);
+ return ret;
}
static u32
@@ -247,9 +248,7 @@ qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val)
{
struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
- qca8k_write(priv, reg, val);
-
- return 0;
+ return qca8k_write(priv, reg, val);
}
static const struct regmap_range qca8k_readable_ranges[] = {
@@ -367,6 +366,7 @@ static int
qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port)
{
u32 reg;
+ int ret;
/* Set the command and FDB index */
reg = QCA8K_ATU_FUNC_BUSY;
@@ -377,7 +377,9 @@ qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port)
}
/* Write the function register triggering the table access */
- qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg);
+ ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg);
+ if (ret)
+ return ret;
/* wait for completion */
if (qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY))
@@ -450,6 +452,7 @@ static int
qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid)
{
u32 reg;
+ int ret;
/* Set the command and VLAN index */
reg = QCA8K_VTU_FUNC1_BUSY;
@@ -457,7 +460,9 @@ qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid)
reg |= vid << QCA8K_VTU_FUNC1_VID_S;
/* Write the function register triggering the table access */
- qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg);
+ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg);
+ if (ret)
+ return ret;
/* wait for completion */
if (qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY))
@@ -505,7 +510,9 @@ qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, bool untagged)
reg |= QCA8K_VTU_FUNC0_EG_MODE_TAG <<
QCA8K_VTU_FUNC0_EG_MODE_S(port);
- qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);
+ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);
+ if (ret)
+ return ret;
ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid);
out:
@@ -548,7 +555,9 @@ qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid)
if (del) {
ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid);
} else {
- qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);
+ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);
+ if (ret)
+ return ret;
ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid);
}
@@ -558,15 +567,21 @@ qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid)
return ret;
}
-static void
+static int
qca8k_mib_init(struct qca8k_priv *priv)
{
+ int ret;
+
mutex_lock(&priv->reg_mutex);
qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_FLUSH | QCA8K_MIB_BUSY);
qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY);
qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP);
- qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB);
+
+ ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB);
+
+exit:
mutex_unlock(&priv->reg_mutex);
+ return ret;
}
static void
@@ -603,6 +618,7 @@ static int
qca8k_mdio_write(struct qca8k_priv *priv, int port, u32 regnum, u16 data)
{
u32 phy, val;
+ int ret;
if (regnum >= QCA8K_MDIO_MASTER_MAX_REG)
return -EINVAL;
@@ -616,7 +632,9 @@ qca8k_mdio_write(struct qca8k_priv *priv, int port, u32 regnum, u16 data)
QCA8K_MDIO_MASTER_REG_ADDR(regnum) |
QCA8K_MDIO_MASTER_DATA(data);
- qca8k_write(priv, QCA8K_MDIO_MASTER_CTRL, val);
+ ret = qca8k_write(priv, QCA8K_MDIO_MASTER_CTRL, val);
+ if (ret)
+ return ret;
return qca8k_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL,
QCA8K_MDIO_MASTER_BUSY);
@@ -626,6 +644,7 @@ static int
qca8k_mdio_read(struct qca8k_priv *priv, int port, u32 regnum)
{
u32 phy, val;
+ int ret;
if (regnum >= QCA8K_MDIO_MASTER_MAX_REG)
return -EINVAL;
@@ -638,7 +657,9 @@ qca8k_mdio_read(struct qca8k_priv *priv, int port, u32 regnum)
QCA8K_MDIO_MASTER_READ | QCA8K_MDIO_MASTER_PHY_ADDR(phy) |
QCA8K_MDIO_MASTER_REG_ADDR(regnum);
- qca8k_write(priv, QCA8K_MDIO_MASTER_CTRL, val);
+ ret = qca8k_write(priv, QCA8K_MDIO_MASTER_CTRL, val);
+ if (ret)
+ return ret;
if (qca8k_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL,
QCA8K_MDIO_MASTER_BUSY))
@@ -769,12 +790,18 @@ qca8k_setup(struct dsa_switch *ds)
QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);
/* Enable MIB counters */
- qca8k_mib_init(priv);
+ ret = qca8k_mib_init(priv);
+ if (ret)
+ dev_warn(priv->dev, "mib init failed");
/* Enable QCA header mode on the cpu port */
- qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(QCA8K_CPU_PORT),
- QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_TX_S |
- QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_RX_S);
+ ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(QCA8K_CPU_PORT),
+ QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_TX_S |
+ QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_RX_S);
+ if (ret) {
+ dev_err(priv->dev, "failed enabling QCA header mode");
+ return ret;
+ }
/* Disable forwarding by default on all ports */
for (i = 0; i < QCA8K_NUM_PORTS; i++)
@@ -786,11 +813,13 @@ qca8k_setup(struct dsa_switch *ds)
qca8k_port_set_status(priv, i, 0);
/* Forward all unknown frames to CPU port for Linux processing */
- qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1,
- BIT(0) << QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S |
- BIT(0) << QCA8K_GLOBAL_FW_CTRL1_BC_DP_S |
- BIT(0) << QCA8K_GLOBAL_FW_CTRL1_MC_DP_S |
- BIT(0) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S);
+ ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1,
+ BIT(0) << QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S |
+ BIT(0) << QCA8K_GLOBAL_FW_CTRL1_BC_DP_S |
+ BIT(0) << QCA8K_GLOBAL_FW_CTRL1_MC_DP_S |
+ BIT(0) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S);
+ if (ret)
+ return ret;
/* Setup connection between CPU port & user ports */
for (i = 0; i < QCA8K_NUM_PORTS; i++) {
@@ -818,16 +847,20 @@ qca8k_setup(struct dsa_switch *ds)
qca8k_rmw(priv, QCA8K_EGRESS_VLAN(i),
0xfff << shift,
QCA8K_PORT_VID_DEF << shift);
- qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(i),
- QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) |
- QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF));
+ ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(i),
+ QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) |
+ QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF));
+ if (ret)
+ return ret;
}
}
/* Setup our port MTUs to match power on defaults */
for (i = 0; i < QCA8K_NUM_PORTS; i++)
priv->port_mtu[i] = ETH_FRAME_LEN + ETH_FCS_LEN;
- qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN);
+ ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN);
+ if (ret)
+ dev_warn(priv->dev, "failed setting MTU settings");
/* Flush the FDB table */
qca8k_fdb_flush(priv);
@@ -1143,8 +1176,8 @@ qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee)
{
struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port);
- int ret = 0;
u32 reg;
+ int ret;
mutex_lock(&priv->reg_mutex);
reg = qca8k_read(priv, QCA8K_REG_EEE_CTRL);
@@ -1157,7 +1190,7 @@ qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee)
reg |= lpi_en;
else
reg &= ~lpi_en;
- qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg);
+ ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg);
exit:
mutex_unlock(&priv->reg_mutex);
@@ -1287,9 +1320,7 @@ qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
mtu = priv->port_mtu[i];
/* Include L2 header / FCS length */
- qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, mtu + ETH_HLEN + ETH_FCS_LEN);
-
- return 0;
+ return qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, mtu + ETH_HLEN + ETH_FCS_LEN);
}
static int
@@ -1384,7 +1415,7 @@ qca8k_port_vlan_add(struct dsa_switch *ds, int port,
bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
struct qca8k_priv *priv = ds->priv;
- int ret = 0;
+ int ret;
ret = qca8k_vlan_add(priv, port, vlan->vid, untagged);
if (ret) {
@@ -1397,9 +1428,11 @@ qca8k_port_vlan_add(struct dsa_switch *ds, int port,
qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port),
0xfff << shift, vlan->vid << shift);
- qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port),
- QCA8K_PORT_VLAN_CVID(vlan->vid) |
- QCA8K_PORT_VLAN_SVID(vlan->vid));
+ ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port),
+ QCA8K_PORT_VLAN_CVID(vlan->vid) |
+ QCA8K_PORT_VLAN_SVID(vlan->vid));
+ if (ret)
+ return ret;
}
return 0;
@@ -1410,7 +1443,7 @@ qca8k_port_vlan_del(struct dsa_switch *ds, int port,
const struct switchdev_obj_port_vlan *vlan)
{
struct qca8k_priv *priv = ds->priv;
- int ret = 0;
+ int ret;
ret = qca8k_vlan_del(priv, port, vlan->vid);
if (ret)
--
2.30.2
next prev parent reply other threads:[~2021-05-08 0:29 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-08 0:28 [RFC PATCH net-next v4 01/28] net: mdio: ipq8064: clean whitespaces in define Ansuel Smith
2021-05-08 0:28 ` [RFC PATCH net-next v4 02/28] net: mdio: ipq8064: add regmap config to disable REGCACHE Ansuel Smith
2021-05-08 15:46 ` Florian Fainelli
2021-05-08 0:28 ` [RFC PATCH net-next v4 03/28] net: mdio: ipq8064: enlarge sleep after read/write operation Ansuel Smith
2021-05-08 15:53 ` Florian Fainelli
2021-05-08 0:28 ` [RFC PATCH net-next v4 04/28] net: dsa: qca8k: change simple print to dev variant Ansuel Smith
2021-05-08 15:47 ` Florian Fainelli
2021-05-08 0:28 ` [RFC PATCH net-next v4 05/28] net: dsa: qca8k: use iopoll macro for qca8k_busy_wait Ansuel Smith
2021-05-08 17:38 ` Andrew Lunn
2021-05-08 0:28 ` [RFC PATCH net-next v4 06/28] net: dsa: qca8k: improve qca8k read/write/rmw bus access Ansuel Smith
2021-05-08 17:39 ` Andrew Lunn
2021-05-08 0:28 ` [RFC PATCH net-next v4 07/28] net: dsa: qca8k: handle qca8k_set_page errors Ansuel Smith
2021-05-08 17:40 ` Andrew Lunn
2021-05-08 0:28 ` [RFC PATCH net-next v4 08/28] net: dsa: qca8k: handle error with qca8k_read operation Ansuel Smith
2021-05-08 17:46 ` Andrew Lunn
2021-05-08 0:28 ` Ansuel Smith [this message]
2021-05-08 17:47 ` [RFC PATCH net-next v4 09/28] net: dsa: qca8k: handle error with qca8k_write operation Andrew Lunn
2021-05-08 0:29 ` [RFC PATCH net-next v4 10/28] net: dsa: qca8k: handle error with qca8k_rmw operation Ansuel Smith
2021-05-08 17:59 ` Andrew Lunn
2021-05-08 0:29 ` [RFC PATCH net-next v4 11/28] net: dsa: qca8k: handle error from qca8k_busy_wait Ansuel Smith
2021-05-08 17:59 ` Andrew Lunn
2021-05-08 0:29 ` [RFC PATCH net-next v4 12/28] net: dsa: qca8k: add support for qca8327 switch Ansuel Smith
2021-05-08 15:47 ` Florian Fainelli
2021-05-08 0:29 ` [RFC PATCH net-next v4 13/28] devicetree: net: dsa: qca8k: Document new compatible qca8327 Ansuel Smith
2021-05-08 15:47 ` Florian Fainelli
2021-05-08 0:29 ` [RFC PATCH net-next v4 14/28] net: dsa: qca8k: add priority tweak to qca8337 switch Ansuel Smith
2021-05-08 0:29 ` [RFC PATCH net-next v4 15/28] net: dsa: qca8k: limit port5 delay to qca8337 Ansuel Smith
2021-05-08 0:29 ` [RFC PATCH net-next v4 16/28] net: dsa: qca8k: add GLOBAL_FC settings needed for qca8327 Ansuel Smith
2021-05-08 0:29 ` [RFC PATCH net-next v4 17/28] net: dsa: qca8k: add support for switch rev Ansuel Smith
2021-05-08 15:48 ` Florian Fainelli
2021-05-08 0:29 ` [RFC PATCH net-next v4 18/28] net: dsa: qca8k: add ethernet-ports fallback to setup_mdio_bus Ansuel Smith
2021-05-08 18:07 ` Andrew Lunn
2021-05-08 0:29 ` [RFC PATCH net-next v4 19/28] net: dsa: qca8k: make rgmii delay configurable Ansuel Smith
2021-05-08 18:12 ` Andrew Lunn
2021-05-08 23:58 ` Ansuel Smith
2021-05-09 1:07 ` Andrew Lunn
2021-05-09 1:17 ` Ansuel Smith
2021-05-09 1:27 ` Andrew Lunn
2021-05-08 0:29 ` [RFC PATCH net-next v4 20/28] net: dsa: qca8k: clear MASTER_EN after phy read/write Ansuel Smith
2021-05-08 0:29 ` [RFC PATCH net-next v4 21/28] net: dsa: qca8k: dsa: qca8k: protect MASTER busy_wait with mdio mutex Ansuel Smith
2021-05-08 0:29 ` [RFC PATCH net-next v4 22/28] net: dsa: qca8k: enlarge mdio delay and timeout Ansuel Smith
2021-05-08 0:29 ` [RFC PATCH net-next v4 23/28] net: dsa: register of_mdiobus if a mdio node is declared Ansuel Smith
2021-05-08 4:36 ` Florian Fainelli
2021-05-08 0:29 ` [RFC PATCH net-next v4 24/28] devicetree: net: dsa: Document use of mdio node inside switch node Ansuel Smith
2021-05-10 14:01 ` Rob Herring
2021-05-08 0:29 ` [RFC PATCH net-next v4 25/28] net: dsa: qca8k: add support for internal phy Ansuel Smith
2021-05-08 0:29 ` [RFC PATCH net-next v4 26/28] net: dsa: permit driver to provide custom phy_mii_mask for slave mdiobus Ansuel Smith
2021-05-08 15:52 ` Florian Fainelli
2021-05-08 16:29 ` Ansuel Smith
2021-05-08 0:29 ` [RFC PATCH net-next v4 27/28] net: dsa: qca8k: pass switch_revision info to phy dev_flags Ansuel Smith
2021-05-08 15:49 ` Florian Fainelli
2021-05-08 0:29 ` [RFC PATCH net-next v4 28/28] net: phy: add qca8k driver for qca8k switch internal PHY Ansuel Smith
2021-05-08 4:35 ` DENG Qingfang
2021-05-08 11:30 ` Ansuel Smith
2021-05-08 15:45 ` Florian Fainelli
2021-05-08 0:29 ` [RFC PATCH net-next v4 00/28] Multiple improvement to qca8k stability Ansuel Smith
2021-05-08 15:45 ` [RFC PATCH net-next v4 01/28] net: mdio: ipq8064: clean whitespaces in define Florian Fainelli
2021-05-08 15:57 ` Joe Perches
2021-05-08 18:02 ` Andrew Lunn
2021-05-08 18:05 ` Ansuel Smith
2021-05-15 17:00 ` Jonathan McDowell
2021-05-15 17:03 ` Florian Fainelli
2021-05-15 17:30 ` Ansuel Smith
2021-05-15 18:08 ` Jonathan McDowell
2021-05-15 18:20 ` Ansuel Smith
2021-05-15 19:40 ` Jonathan McDowell
2021-05-15 19:47 ` Ansuel Smith
2021-05-15 23:52 ` Andrew Lunn
2021-05-16 0:23 ` Ansuel Smith
2021-05-16 9:37 ` Jonathan McDowell
2021-05-16 9:49 ` Jonathan McDowell
2021-05-16 10:12 ` Jonathan McDowell
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