Re: [PATCH net-next 12/13] net: dsa: sja1105: expose the SGMII PCS as an mdio_device

Florian Fainelli
2021-05-25T02:35:40Z

On 5/24/2021 4:22 PM, Vladimir Oltean wrote:
> From: Vladimir Oltean <vladimir.oltean@nxp.com>
>
> The SJA1110 has up to 4 PCSes for SGMII/2500base-x, and they have a
> different access procedure compared to the SJA1105. Since both have a
> register layout reminiscent of clause 45, the chosen abstraction to hide
> this difference away was to implement an internal MDIO bus for the PCS,
> and to use a high-level set of procedures called sja1105_pcs_read and
> sja1105_pcs_write.
>
> Since we touch all PCS accessors again, now it is a good time to check
> for error codes from the hardware access as well. We can't propagate the
> errors very far due to phylink returning void for mac_config and
> mac_link_up, but at least we print them to the console.
>
> The SGMII PCS of the SJA1110 is not functional at this point, it needs a
> different initialization sequence compared to SJA1105. That will be done
> by the next patch.
>
> Cc: Russell King <linux@armlinux.org.uk>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---

[snip]

> +
> +int sja1110_pcs_mdio_read(struct mii_bus *bus, int phy, int reg)
> +{
> + struct sja1105_mdio_private *mdio_priv = bus->priv;
> + struct sja1105_private *priv = mdio_priv->priv;
> + const struct sja1105_regs *regs = priv->info->regs;
> + int offset, bank;
> + u64 addr;
> + u32 tmp;
> + u16 mmd;
> + int rc;
> +
> + if (!(reg & MII_ADDR_C45))
> + return -EINVAL;
> +
> + /* This addressing scheme reserves register 0xff for the bank address
> + * register, so that can never be addressed.
> + */
> + if (WARN_ON(offset == 0xff))
> + return -ENODEV;

offset is not initialized here, did you mean to do this after it gets
initialized? And likewise in sja1110_pcs_mdio_write()?
--
Florian