Re: [PATCH net-next 11/13] net: dsa: sja1105: register the MDIO buses for 100base-T1 and 100base-TX

Vladimir Oltean
2021-05-25T11:54:36Z

On Tue, May 25, 2021 at 04:18:24AM +0200, Andrew Lunn wrote:
> On Tue, May 25, 2021 at 02:22:12AM +0300, Vladimir Oltean wrote:
> > From: Vladimir Oltean <vladimir.oltean@nxp.com>
> >
> > The SJA1110 contains two types of integrated PHYs: one 100base-TX PHY
> > and multiple 100base-T1 PHYs.
> >
> > The access procedure for the 100base-T1 PHYs is also different than it
> > is for the 100base-TX one. So we register 2 MDIO buses, one for the
> > base-TX and the other for the base-T1. Each bus has an OF node which is
> > a child of the "mdio" subnode of the switch, and they are recognized by
> > compatible string.
>
> The mv88e6xxx also can have two MDIO busses. It is however an internal
> bus for the internal PHYs and an external bus. The code however
> evolved, since earlier devices only had one MDIO i ended up with a
> binding like this:
>
> mdio {
> #address-cells = <1>;
> #size-cells = <0>;
> interrupt-parent = <&gpio0>;
> interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> interrupt-controller;
> #interrupt-cells = <2>;
>
> switch0: switch@0 {
> compatible = "marvell,mv88e6390";
> reg = <0>;
> reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
>
> mdio {
> #address-cells = <1>;
> #size-cells = <0>;
> switch1phy0: switch1phy0@0 {
> reg = <0>;
> interrupt-parent = <&switch0>;
> interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> };
> };
>
> mdio1 {
> compatible = "marvell,mv88e6xxx-mdio-external";
> #address-cells = <1>;
> #size-cells = <0>;
> switch1phy9: switch1phy0@9 {
> reg = <9>;
> };
> };
> };
> };
>
> It however sounds like you have the two busses one level deeper?
>
> It would be good if you document this as part of the binding.

Yes, it looks like this:

ethernet-switch@2 {
compatible = "nxp,sja1110a";

ethernet-ports {
...
};

mdio {
#address-cells = <1>;
#size-cells = <0>;

mdio@0 {
reg = <0>;
compatible = "nxp,sja1110-base-t1-mdio";
#address-cells = <1>;
#size-cells = <0>;

sw2_port5_base_t1_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x1>;
};

...
};

mdio@1 {
reg = <1>;
compatible = "nxp,sja1110-base-tx-mdio";
#address-cells = <1>;
#size-cells = <0>;

sw2_port1_base_tx_phy: ethernet-phy@1 {
reg = <0x1>;
};
};
};
};

I will try to document it.