From: Vladimir Oltean <olteanv@gmail.com>
To: Jakub Kicinski <kuba@kernel.org>,
"David S. Miller" <davem@davemloft.net>,
netdev@vger.kernel.org
Cc: Florian Fainelli <f.fainelli@gmail.com>,
Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Vladimir Oltean <vladimir.oltean@nxp.com>,
Russell King <linux@armlinux.org.uk>,
Heiner Kallweit <hkallweit1@gmail.com>
Subject: [PATCH v3 net-next 0/8] Part 2 of SJA1105 DSA driver preparation for new switch introduction (SJA1110)
Date: Mon, 31 May 2021 01:59:31 +0300 [thread overview]
Message-ID: <20210530225939.772553-1-olteanv@gmail.com> (raw)
From: Vladimir Oltean <vladimir.oltean@nxp.com>
This series is a continuation of:
https://patchwork.kernel.org/project/netdevbpf/cover/20210524131421.1030789-1-olteanv@gmail.com/
even though it isn't the first time these patches are submitted (they
were part of the group previously called "Add NXP SJA1110 support to the
sja1105 DSA driver"):
https://patchwork.kernel.org/project/netdevbpf/cover/20210526135535.2515123-1-vladimir.oltean@nxp.com/
but I broke that up again since these patches are already reviewed, for
the most part. There are no changes compared to v2 and v1.
This series of patches contains:
- an adaptation of the driver to the new "ethernet-ports" OF node name
- an adaptation of the driver to support more than 1 SGMII port
- a generalization of the supported phy_interface_t values per port
- an adaptation to encode SPEED_10, SPEED_100, SPEED_1000 into the
hardware registers differently depending on switch revision
- a consolidation of the PHY interface type used for RGMII and another
one for the API exposed for sja1105_dynamic_config_read()
Cc: Russell King <linux@armlinux.org.uk>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
Vladimir Oltean (8):
net: dsa: sja1105: be compatible with "ethernet-ports" OF node name
net: dsa: sja1105: allow SGMII PCS configuration to be per port
net: dsa: sja1105: the 0x1F0000 SGMII "base address" is actually
MDIO_MMD_VEND2
net: dsa: sja1105: cache the phy-mode port property
net: dsa: sja1105: add a PHY interface type compatibility matrix
net: dsa: sja1105: add a translation table for port speeds
net: dsa: sja1105: always keep RGMII ports in the MAC role
net: dsa: sja1105: some table entries are always present when read
dynamically
drivers/net/dsa/sja1105/sja1105.h | 24 +-
drivers/net/dsa/sja1105/sja1105_clocking.c | 29 +--
.../net/dsa/sja1105/sja1105_dynamic_config.c | 15 +-
drivers/net/dsa/sja1105/sja1105_main.c | 207 ++++++++++--------
drivers/net/dsa/sja1105/sja1105_spi.c | 63 +++++-
5 files changed, 206 insertions(+), 132 deletions(-)
--
2.25.1
next reply other threads:[~2021-05-30 23:00 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-30 22:59 Vladimir Oltean [this message]
2021-05-30 22:59 ` [PATCH v3 net-next 1/8] net: dsa: sja1105: be compatible with "ethernet-ports" OF node name Vladimir Oltean
2021-05-30 22:59 ` [PATCH v3 net-next 2/8] net: dsa: sja1105: allow SGMII PCS configuration to be per port Vladimir Oltean
2021-05-30 22:59 ` [PATCH v3 net-next 3/8] net: dsa: sja1105: the 0x1F0000 SGMII "base address" is actually MDIO_MMD_VEND2 Vladimir Oltean
2021-05-30 22:59 ` [PATCH v3 net-next 4/8] net: dsa: sja1105: cache the phy-mode port property Vladimir Oltean
2021-05-30 22:59 ` [PATCH v3 net-next 5/8] net: dsa: sja1105: add a PHY interface type compatibility matrix Vladimir Oltean
2021-05-30 22:59 ` [PATCH v3 net-next 6/8] net: dsa: sja1105: add a translation table for port speeds Vladimir Oltean
2021-05-30 22:59 ` [PATCH v3 net-next 7/8] net: dsa: sja1105: always keep RGMII ports in the MAC role Vladimir Oltean
2021-05-30 22:59 ` [PATCH v3 net-next 8/8] net: dsa: sja1105: some table entries are always present when read dynamically Vladimir Oltean
2021-06-01 5:50 ` [PATCH v3 net-next 0/8] Part 2 of SJA1105 DSA driver preparation for new switch introduction (SJA1110) patchwork-bot+netdevbpf
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