From: Wong Vee Khee <vee.khee.wong@linux.intel.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next 1/1] net: stmmac: enable platform specific safety features
Date: Wed, 2 Jun 2021 06:53:32 +0800 [thread overview]
Message-ID: <20210601225332.GA28151@linux.intel.com> (raw)
In-Reply-To: <YLawrTO4pkgc6tnb@lunn.ch>
On Wed, Jun 02, 2021 at 12:11:57AM +0200, Andrew Lunn wrote:
> On Tue, Jun 01, 2021 at 09:52:35PM +0800, Wong Vee Khee wrote:
> > On Intel platforms, not all safety features are enabled on the hardware.
>
> Is it possible to read a register is determine what safety features
> have been synthesised?
>
No. The value of these registers after reset are 0x0. We need to set it
manually.
VK
next prev parent reply other threads:[~2021-06-01 22:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-01 13:52 [PATCH net-next 1/1] net: stmmac: enable platform specific safety features Wong Vee Khee
2021-06-01 22:11 ` Andrew Lunn
2021-06-01 22:53 ` Wong Vee Khee [this message]
2021-06-02 2:28 ` Andrew Lunn
2021-06-02 0:10 ` patchwork-bot+netdevbpf
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