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From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Xu Liang <lxu@maxlinear.com>
Cc: andrew@lunn.ch, hkallweit1@gmail.com, netdev@vger.kernel.org,
	davem@davemloft.net, kuba@kernel.org,
	vee.khee.wong@linux.intel.com, hmehrtens@maxlinear.com,
	tmohren@maxlinear.com
Subject: Re: [PATCH v2] net: phy: add Maxlinear GPY115/21x/24x driver
Date: Thu, 3 Jun 2021 10:17:50 +0100	[thread overview]
Message-ID: <20210603091750.GQ30436@shell.armlinux.org.uk> (raw)
In-Reply-To: <20210603073438.33967-1-lxu@maxlinear.com>

Hi,

On Thu, Jun 03, 2021 at 03:34:38PM +0800, Xu Liang wrote:
> diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
> index bcda7ed2455d..70efab3659ee 100644
> --- a/drivers/net/phy/Makefile
> +++ b/drivers/net/phy/Makefile
> @@ -70,6 +70,7 @@ obj-$(CONFIG_MICREL_PHY)	+= micrel.o
>  obj-$(CONFIG_MICROCHIP_PHY)	+= microchip.o
>  obj-$(CONFIG_MICROCHIP_T1_PHY)	+= microchip_t1.o
>  obj-$(CONFIG_MICROSEMI_PHY)	+= mscc/
> +obj-$(CONFIG_MXL_GPHY)          += mxl-gpy.o

This should use tab(s) to align indentation rather than spaces.

> +static int gpy_config_init(struct phy_device *phydev)
> +{
> +	int ret, fw_ver;
> +
> +	/* Show GPY PHY FW version in dmesg */
> +	fw_ver = phy_read(phydev, PHY_FWV);
> +	if (fw_ver < 0)
> +		return fw_ver;
> +
> +	phydev_info(phydev, "Firmware Version: 0x%04X (%s)\n", fw_ver,
> +		    (fw_ver & PHY_FWV_REL_MASK) ? "release" : "test");

Does this need to print the firmware version each time config_init()
is called? Is it likely to change beyond? Would it be more sensible
to print it in the probe() method?

> +static int gpy_config_aneg(struct phy_device *phydev)
> +{
> +	bool changed = false;
> +	u32 adv;
> +	int ret;
> +
> +	if (phydev->autoneg == AUTONEG_DISABLE) {
> +		return phydev->duplex != DUPLEX_FULL
> +			? genphy_setup_forced(phydev)
> +			: genphy_c45_pma_setup_forced(phydev);

I think this needs a comment to describe what is going on here to
explain why the duplex setting influences whether we program the PHY
via C22 or C45.

> +static void gpy_update_interface(struct phy_device *phydev)
> +{
> +	int ret;
> +
> +	/* Interface mode is fixed for USXGMII and integrated PHY */
> +	if (phydev->interface == PHY_INTERFACE_MODE_USXGMII ||
> +	    phydev->interface == PHY_INTERFACE_MODE_INTERNAL)
> +		return;
> +
> +	/* Automatically switch SERDES interface between SGMII and 2500-BaseX
> +	 * according to speed. Disable ANEG in 2500-BaseX mode.
> +	 */
> +	switch (phydev->speed) {
> +	case SPEED_2500:
> +		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
> +		ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1,
> +					     VSPEC1_SGMII_CTRL,
> +					     VSPEC1_SGMII_CTRL_ANEN, 0);

Do you need to know if the bit was changed? It doesn't appear so, so
please consider using phy_modify_mmd() here and in the other part of
this switch block.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

  reply	other threads:[~2021-06-03  9:17 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-03  7:34 [PATCH v2] net: phy: add Maxlinear GPY115/21x/24x driver Xu Liang
2021-06-03  9:17 ` Russell King (Oracle) [this message]
2021-06-03 10:36   ` Liang Xu
2021-06-03 15:10   ` Liang Xu
2021-06-03 15:21     ` Andrew Lunn
2021-06-03 15:32       ` Liang Xu
2021-06-03 17:05         ` Andrew Lunn
2021-06-03 17:54           ` Liang Xu
2021-06-04 12:09             ` Andrew Lunn
2021-06-04 12:39               ` Liang Xu
2021-06-04 12:15 ` Andrew Lunn
2021-06-04 12:52   ` Liang Xu
2021-06-04 20:39     ` Andrew Lunn
2021-06-05  3:46       ` Liang Xu
2021-06-05 14:37         ` Andrew Lunn
2021-06-07  4:04           ` Liang Xu
2021-06-07 12:15             ` Andrew Lunn
2021-06-07 13:28               ` Liang Xu

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