From: Ansuel Smith <ansuelsmth@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Russell King <linux@armlinux.org.uk>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Ansuel Smith <ansuelsmth@gmail.com>
Subject: [net-next PATCH v5 14/14] drivers: net: dsa: qca8k: move port config to dedicated struct
Date: Mon, 11 Oct 2021 03:30:24 +0200 [thread overview]
Message-ID: <20211011013024.569-15-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20211011013024.569-1-ansuelsmth@gmail.com>
Move ports related config to dedicated struct to keep things organized.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
drivers/net/dsa/qca8k.c | 26 +++++++++++++-------------
drivers/net/dsa/qca8k.h | 10 +++++++---
2 files changed, 20 insertions(+), 16 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 28635f4feaf5..0311249f6a26 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -1013,7 +1013,7 @@ qca8k_parse_port_config(struct qca8k_priv *priv)
delay = 3;
}
- priv->rgmii_tx_delay[cpu_port_index] = delay;
+ priv->ports_config.rgmii_tx_delay[cpu_port_index] = delay;
delay = 0;
@@ -1029,20 +1029,20 @@ qca8k_parse_port_config(struct qca8k_priv *priv)
delay = 3;
}
- priv->rgmii_rx_delay[cpu_port_index] = delay;
+ priv->ports_config.rgmii_rx_delay[cpu_port_index] = delay;
if (of_property_read_bool(port_dn, "qca,sgmii-txclk-falling-edge"))
- priv->sgmii_tx_clk_falling_edge = true;
+ priv->ports_config.sgmii_tx_clk_falling_edge = true;
if (of_property_read_bool(port_dn, "qca,sgmii-rxclk-falling-edge"))
- priv->sgmii_rx_clk_falling_edge = true;
+ priv->ports_config.sgmii_rx_clk_falling_edge = true;
if (of_property_read_bool(port_dn, "qca,sgmii-enable-pll")) {
- priv->sgmii_enable_pll = true;
+ priv->ports_config.sgmii_enable_pll = true;
if (priv->switch_id == QCA8K_ID_QCA8327) {
dev_err(priv->dev, "SGMII PLL should NOT be enabled for qca8327. Aborting enabling");
- priv->sgmii_enable_pll = false;
+ priv->ports_config.sgmii_enable_pll = false;
}
if (priv->switch_revision < 2)
@@ -1268,15 +1268,15 @@ qca8k_mac_config_setup_internal_delay(struct qca8k_priv *priv, int cpu_port_inde
* not enabled. With ID or TX/RXID delay is enabled and set
* to the default and recommended value.
*/
- if (priv->rgmii_tx_delay[cpu_port_index]) {
- delay = priv->rgmii_tx_delay[cpu_port_index];
+ if (priv->ports_config.rgmii_tx_delay[cpu_port_index]) {
+ delay = priv->ports_config.rgmii_tx_delay[cpu_port_index];
val |= QCA8K_PORT_PAD_RGMII_TX_DELAY(delay) |
QCA8K_PORT_PAD_RGMII_TX_DELAY_EN;
}
- if (priv->rgmii_rx_delay[cpu_port_index]) {
- delay = priv->rgmii_rx_delay[cpu_port_index];
+ if (priv->ports_config.rgmii_rx_delay[cpu_port_index]) {
+ delay = priv->ports_config.rgmii_rx_delay[cpu_port_index];
val |= QCA8K_PORT_PAD_RGMII_RX_DELAY(delay) |
QCA8K_PORT_PAD_RGMII_RX_DELAY_EN;
@@ -1384,7 +1384,7 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
val |= QCA8K_SGMII_EN_SD;
- if (priv->sgmii_enable_pll)
+ if (priv->ports_config.sgmii_enable_pll)
val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX |
QCA8K_SGMII_EN_TX;
@@ -1412,10 +1412,10 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
val = 0;
/* SGMII Clock phase configuration */
- if (priv->sgmii_rx_clk_falling_edge)
+ if (priv->ports_config.sgmii_rx_clk_falling_edge)
val |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE;
- if (priv->sgmii_tx_clk_falling_edge)
+ if (priv->ports_config.sgmii_tx_clk_falling_edge)
val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE;
if (val)
diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h
index c5ca6277b45b..e10571a398c9 100644
--- a/drivers/net/dsa/qca8k.h
+++ b/drivers/net/dsa/qca8k.h
@@ -270,15 +270,19 @@ enum {
QCA8K_CPU_PORT6,
};
-struct qca8k_priv {
- u8 switch_id;
- u8 switch_revision;
+struct qca8k_ports_config {
bool sgmii_rx_clk_falling_edge;
bool sgmii_tx_clk_falling_edge;
bool sgmii_enable_pll;
u8 rgmii_rx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */
u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */
+};
+
+struct qca8k_priv {
+ u8 switch_id;
+ u8 switch_revision;
bool legacy_phy_port_mapping;
+ struct qca8k_ports_config ports_config;
struct regmap *regmap;
struct mii_bus *bus;
struct ar8xxx_port_status port_sts[QCA8K_NUM_PORTS];
--
2.32.0
next prev parent reply other threads:[~2021-10-11 1:31 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-11 1:30 [net-next PATCH v5 00/14] Multiple improvement for qca8337 switch Ansuel Smith
2021-10-11 1:30 ` [net-next PATCH v5 01/14] net: dsa: qca8k: add mac_power_sel support Ansuel Smith
2021-10-11 1:47 ` Florian Fainelli
2021-10-11 1:30 ` [net-next PATCH v5 02/14] dt-bindings: net: dsa: qca8k: Add SGMII clock phase properties Ansuel Smith
2021-10-11 1:48 ` Florian Fainelli
2021-10-11 1:30 ` [net-next PATCH v5 03/14] net: dsa: qca8k: add support for sgmii falling edge Ansuel Smith
2021-10-11 1:49 ` Florian Fainelli
2021-10-11 1:30 ` [net-next PATCH v5 04/14] dt-bindings: net: dsa: qca8k: Document support for CPU port 6 Ansuel Smith
2021-10-11 1:50 ` Florian Fainelli
2021-10-11 2:02 ` Ansuel Smith
2021-10-11 1:30 ` [net-next PATCH v5 05/14] drivers: net: dsa: qca8k: add support for cpu " Ansuel Smith
2021-10-11 2:01 ` Florian Fainelli
2021-10-11 4:49 ` DENG Qingfang
2021-10-11 1:30 ` [net-next PATCH v5 06/14] net: dsa: qca8k: rework rgmii delay logic and scan " Ansuel Smith
2021-10-11 2:11 ` Florian Fainelli
2021-10-11 2:45 ` Florian Fainelli
2021-10-11 5:15 ` kernel test robot
2021-10-11 1:30 ` [net-next PATCH v5 07/14] dt-bindings: net: dsa: qca8k: Document qca,sgmii-enable-pll Ansuel Smith
2021-10-11 1:30 ` [net-next PATCH v5 08/14] net: dsa: qca8k: add explicit SGMII PLL enable Ansuel Smith
2021-10-11 2:46 ` Florian Fainelli
2021-10-11 1:30 ` [net-next PATCH v5 09/14] dt-bindings: net: dsa: qca8k: Document qca,led-open-drain binding Ansuel Smith
2021-10-11 1:30 ` [net-next PATCH v5 10/14] drivers: net: dsa: qca8k: add support for pws config reg Ansuel Smith
2021-10-11 2:48 ` Florian Fainelli
2021-10-11 1:30 ` [net-next PATCH v5 11/14] dt-bindings: net: dsa: qca8k: document support for qca8328 Ansuel Smith
2021-10-11 1:58 ` Florian Fainelli
2021-10-11 1:30 ` [net-next PATCH v5 12/14] drivers: net: dsa: qca8k: add support for QCA8328 Ansuel Smith
2021-10-11 2:42 ` Florian Fainelli
2021-10-11 1:30 ` [net-next PATCH v5 13/14] drivers: net: dsa: qca8k: set internal delay also for sgmii Ansuel Smith
2021-10-11 2:44 ` Florian Fainelli
2021-10-11 1:30 ` Ansuel Smith [this message]
2021-10-11 2:47 ` [net-next PATCH v5 14/14] drivers: net: dsa: qca8k: move port config to dedicated struct Florian Fainelli
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