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From: Saeed Mahameed <saeed@kernel.org>
To: "David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>
Cc: netdev@vger.kernel.org, Amir Tzin <amirtz@nvidia.com>,
	Moshe Shemesh <moshe@nvidia.com>,
	Saeed Mahameed <saeedm@nvidia.com>
Subject: [net-next 01/13] net/mlx5: Add layout to support default timeouts register
Date: Fri, 15 Oct 2021 17:38:50 -0700	[thread overview]
Message-ID: <20211016003902.57116-2-saeed@kernel.org> (raw)
In-Reply-To: <20211016003902.57116-1-saeed@kernel.org>

From: Amir Tzin <amirtz@nvidia.com>

Add needed structures and defines for DTOR (default timeouts register).
This will be used to get timeouts values from FW instead of hard coded
values in the driver code thus enabling support for slower devices which
need longer timeouts.

Signed-off-by: Amir Tzin <amirtz@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
 include/linux/mlx5/device.h   |  4 +++-
 include/linux/mlx5/driver.h   |  1 +
 include/linux/mlx5/mlx5_ifc.h | 37 ++++++++++++++++++++++++++++++++++-
 3 files changed, 40 insertions(+), 2 deletions(-)

diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 66eaf0aa7f69..109cc8106d16 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -577,7 +577,9 @@ struct mlx5_init_seg {
 	__be32			rsvd1[120];
 	__be32			initializing;
 	struct health_buffer	health;
-	__be32			rsvd2[880];
+	__be32			rsvd2[878];
+	__be32			cmd_exec_to;
+	__be32			cmd_q_init_to;
 	__be32			internal_timer_h;
 	__be32			internal_timer_l;
 	__be32			rsvd3[2];
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 0ca719c00824..ccbd87fbd3bf 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -156,6 +156,7 @@ enum {
 	MLX5_REG_MIRC		 = 0x9162,
 	MLX5_REG_SBCAM		 = 0xB01F,
 	MLX5_REG_RESOURCE_DUMP   = 0xC000,
+	MLX5_REG_DTOR            = 0xC00E,
 };
 
 enum mlx5_qpts_trust_state {
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 993204a6c1a1..b8bff5109656 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -1306,7 +1306,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
 	u8         vhca_resource_manager[0x1];
 
 	u8         hca_cap_2[0x1];
-	u8         reserved_at_21[0x2];
+	u8         reserved_at_21[0x1];
+	u8         dtor[0x1];
 	u8         event_on_vhca_state_teardown_request[0x1];
 	u8         event_on_vhca_state_in_use[0x1];
 	u8         event_on_vhca_state_active[0x1];
@@ -2807,6 +2808,40 @@ struct mlx5_ifc_dropped_packet_logged_bits {
 	u8         reserved_at_0[0xe0];
 };
 
+struct mlx5_ifc_default_timeout_bits {
+	u8         to_multiplier[0x3];
+	u8         reserved_at_3[0x9];
+	u8         to_value[0x14];
+};
+
+struct mlx5_ifc_dtor_reg_bits {
+	u8         reserved_at_0[0x20];
+
+	struct mlx5_ifc_default_timeout_bits pcie_toggle_to;
+
+	u8         reserved_at_40[0x60];
+
+	struct mlx5_ifc_default_timeout_bits health_poll_to;
+
+	struct mlx5_ifc_default_timeout_bits full_crdump_to;
+
+	struct mlx5_ifc_default_timeout_bits fw_reset_to;
+
+	struct mlx5_ifc_default_timeout_bits flush_on_err_to;
+
+	struct mlx5_ifc_default_timeout_bits pci_sync_update_to;
+
+	struct mlx5_ifc_default_timeout_bits tear_down_to;
+
+	struct mlx5_ifc_default_timeout_bits fsm_reactivate_to;
+
+	struct mlx5_ifc_default_timeout_bits reclaim_pages_to;
+
+	struct mlx5_ifc_default_timeout_bits reclaim_vfs_pages_to;
+
+	u8         reserved_at_1c0[0x40];
+};
+
 enum {
 	MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN                 = 0x1,
 	MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR  = 0x2,
-- 
2.31.1


  reply	other threads:[~2021-10-16  0:39 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-16  0:38 [pull request][net-next 00/13] mlx5 updates 2021-10-15 Saeed Mahameed
2021-10-16  0:38 ` Saeed Mahameed [this message]
2021-10-16  8:00   ` [net-next 01/13] net/mlx5: Add layout to support default timeouts register patchwork-bot+netdevbpf
2021-10-16  0:38 ` [net-next 02/13] net/mlx5: Read timeout values from init segment Saeed Mahameed
2021-10-16  0:38 ` [net-next 03/13] net/mlx5: Read timeout values from DTOR Saeed Mahameed
2021-10-16  0:38 ` [net-next 04/13] net/mlx5: Bridge, provide flow source hints Saeed Mahameed
2021-10-16  0:38 ` [net-next 05/13] net/mlx5i: Enable Rx steering for IPoIB via ethtool Saeed Mahameed
2021-10-16  0:38 ` [net-next 06/13] net/mlx5: Disable roce at HCA level Saeed Mahameed
2021-10-16  0:38 ` [net-next 07/13] net/mlx5: CT: Fix missing cleanup of ct nat table on init failure Saeed Mahameed
2021-10-16  0:38 ` [net-next 08/13] net/mlx5e: Add extack msgs related to TC for better debug Saeed Mahameed
2021-10-16  0:38 ` [net-next 09/13] net/mlx5: DR, Prefer kcalloc over open coded arithmetic Saeed Mahameed
2021-10-16  0:38 ` [net-next 10/13] net/mlx5: Check return status first when querying system_image_guid Saeed Mahameed
2021-10-16  0:39 ` [net-next 11/13] net/mlx5: Introduce new device index wrapper Saeed Mahameed
2021-10-16  0:39 ` [net-next 12/13] net/mlx5: Use native_port_num as 1st option of device index Saeed Mahameed
2021-10-16  0:39 ` [net-next 13/13] net/mlx5: Use system_image_guid to determine bonding Saeed Mahameed

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