From: Ruud Bos <kernel.hbk@gmail.com>
To: jesse.brandeburg@intel.com, anthony.l.nguyen@intel.com,
intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org, richardcochran@gmail.com,
davem@davemloft.net, kuba@kernel.org,
Ruud Bos <kernel.hbk@gmail.com>
Subject: [PATCH net-next v2 4/4] igb: support EXTTS on 82580/i354/i350
Date: Thu, 28 Oct 2021 16:34:59 +0200 [thread overview]
Message-ID: <20211028143459.903439-5-kernel.hbk@gmail.com> (raw)
In-Reply-To: <20211028143459.903439-1-kernel.hbk@gmail.com>
Support for the PTP pin function on 82580/i354/i350 based adapters.
Because the time registers of these adapters do not have the nice split in
second rollovers as the i210 has, the implementation is slightly more
complex compared to the i210 implementation.
Signed-off-by: Ruud Bos <kernel.hbk@gmail.com>
---
drivers/net/ethernet/intel/igb/igb_main.c | 20 ++++++++++---
drivers/net/ethernet/intel/igb/igb_ptp.c | 36 ++++++++++++++++++++++-
2 files changed, 51 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index 715302377b1a..13b0c1bb26f0 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -6813,18 +6813,30 @@ static void igb_perout(struct igb_adapter *adapter, int tsintr_tt)
static void igb_extts(struct igb_adapter *adapter, int tsintr_tt)
{
struct e1000_hw *hw = &adapter->hw;
- u32 sec, nsec;
+ int auxstmpl = (tsintr_tt == 1) ? E1000_AUXSTMPL1 : E1000_AUXSTMPL0;
+ int auxstmph = (tsintr_tt == 1) ? E1000_AUXSTMPH1 : E1000_AUXSTMPH0;
+ struct timespec64 ts;
struct ptp_clock_event event;
int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_EXTTS, tsintr_tt);
if (pin < 0 || pin >= IGB_N_EXTTS)
return;
- nsec = rd32((tsintr_tt == 1) ? E1000_AUXSTMPL1 : E1000_AUXSTMPL0);
- sec = rd32((tsintr_tt == 1) ? E1000_AUXSTMPH1 : E1000_AUXSTMPH0);
+ if ((hw->mac.type == e1000_82580) ||
+ (hw->mac.type == e1000_i354) ||
+ (hw->mac.type == e1000_i350)) {
+ s64 ns = rd32(auxstmpl);
+
+ ns += ((s64)(rd32(auxstmph) & 0xFF)) << 32;
+ ts = ns_to_timespec64(ns);
+ } else {
+ ts.tv_nsec = rd32(auxstmpl);
+ ts.tv_sec = rd32(auxstmph);
+ }
+
event.type = PTP_CLOCK_EXTTS;
event.index = tsintr_tt;
- event.timestamp = sec * 1000000000ULL + nsec;
+ event.timestamp = ts.tv_sec * 1000000000ULL + ts.tv_nsec;
ptp_clock_event(adapter->ptp_clock, &event);
}
diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c
index 57af8db73be6..6d59847f5097 100644
--- a/drivers/net/ethernet/intel/igb/igb_ptp.c
+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c
@@ -524,7 +524,41 @@ static int igb_ptp_feature_enable_82580(struct ptp_clock_info *ptp,
switch (rq->type) {
case PTP_CLK_REQ_EXTTS:
- return -EOPNOTSUPP;
+ /* Reject requests with unsupported flags */
+ if (rq->extts.flags & ~(PTP_ENABLE_FEATURE |
+ PTP_RISING_EDGE |
+ PTP_FALLING_EDGE |
+ PTP_STRICT_FLAGS))
+ return -EOPNOTSUPP;
+
+ if (on) {
+ pin = ptp_find_pin(igb->ptp_clock, PTP_PF_EXTTS,
+ rq->extts.index);
+ if (pin < 0)
+ return -EBUSY;
+ }
+ if (rq->extts.index == 1) {
+ tsauxc_mask = TSAUXC_EN_TS1;
+ tsim_mask = TSINTR_AUTT1;
+ } else {
+ tsauxc_mask = TSAUXC_EN_TS0;
+ tsim_mask = TSINTR_AUTT0;
+ }
+ spin_lock_irqsave(&igb->tmreg_lock, flags);
+ tsauxc = rd32(E1000_TSAUXC);
+ tsim = rd32(E1000_TSIM);
+ if (on) {
+ igb_pin_extts(igb, rq->extts.index, pin);
+ tsauxc |= tsauxc_mask;
+ tsim |= tsim_mask;
+ } else {
+ tsauxc &= ~tsauxc_mask;
+ tsim &= ~tsim_mask;
+ }
+ wr32(E1000_TSAUXC, tsauxc);
+ wr32(E1000_TSIM, tsim);
+ spin_unlock_irqrestore(&igb->tmreg_lock, flags);
+ return 0;
case PTP_CLK_REQ_PEROUT:
/* Reject requests with unsupported flags */
--
2.30.2
next prev parent reply other threads:[~2021-10-28 14:38 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-28 14:34 [PATCH net-next v2 0/4] igb: support PEROUT and EXTTS PTP pin functions on 82580/i354/i350 Ruud Bos
2021-10-28 14:34 ` [PATCH net-next v2 1/4] igb: move SDP config initialization to separate function Ruud Bos
2021-12-22 4:20 ` [Intel-wired-lan] " G, GurucharanX
2021-10-28 14:34 ` [PATCH net-next v2 2/4] igb: move PEROUT and EXTTS isr logic to separate functions Ruud Bos
2021-12-22 4:19 ` [Intel-wired-lan] " G, GurucharanX
2021-10-28 14:34 ` [PATCH net-next v2 3/4] igb: support PEROUT on 82580/i354/i350 Ruud Bos
2021-12-22 4:18 ` [Intel-wired-lan] " G, GurucharanX
2021-10-28 14:34 ` Ruud Bos [this message]
2021-12-22 4:17 ` [Intel-wired-lan] [PATCH net-next v2 4/4] igb: support EXTTS " G, GurucharanX
2021-12-23 20:03 ` [PATCH net-next v2 0/4] igb: support PEROUT and EXTTS PTP pin functions " Richard Cochran
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