[PATCH mlx5-next 0/4] Add support to multiple RDMA priorities for FDB rules

[PATCH mlx5-next 0/4] Add support to multiple RDMA priorities for FDB rules

[Saeed Mahameed]

From: Saeed Mahameed <saeedm@nvidia.com>

Currently, the driver ignores the user's priority for flow steering
rules in FDB namespace. Change it and create the rule in the right
priority.

It will allow to create FDB steering rules in up to 16 different
priorities.

Maor Gottlieb (4):
  net/mlx5: Separate FDB namespace
  net/mlx5: Refactor mlx5_get_flow_namespace
  net/mlx5: Create more priorities for FDB bypass namespace
  RDMA/mlx5: Add support to multiple priorities for FDB rules

 drivers/infiniband/hw/mlx5/fs.c               | 18 ++---
 drivers/infiniband/hw/mlx5/mlx5_ib.h          |  3 +-
 .../net/ethernet/mellanox/mlx5/core/fs_cmd.c  |  4 +-
 .../net/ethernet/mellanox/mlx5/core/fs_core.c | 76 +++++++++++++++----
 include/linux/mlx5/fs.h                       |  1 +
 5 files changed, 75 insertions(+), 27 deletions(-)

--
2.31.1

[PATCH mlx5-next 1/4] net/mlx5: Separate FDB namespace

[Saeed Mahameed]

From: Maor Gottlieb <maorg@nvidia.com>

This patch doesn't add an additional namespaces, but just separates the
naming to be used by each FDB user, bypass and kernel.
Downstream patches will actually split this up and allow to have more
than single priority for the bypass users.

Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
 drivers/infiniband/hw/mlx5/fs.c                   | 14 +++++++-------
 drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c  |  4 +++-
 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c |  1 +
 include/linux/mlx5/fs.h                           |  1 +
 4 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/infiniband/hw/mlx5/fs.c b/drivers/infiniband/hw/mlx5/fs.c
index b780185d9dc6..510ef85ef6e4 100644
--- a/drivers/infiniband/hw/mlx5/fs.c
+++ b/drivers/infiniband/hw/mlx5/fs.c
@@ -1508,7 +1508,7 @@ _get_flow_table(struct mlx5_ib_dev *dev,
 		    !esw_encap)
 			flags |= MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;
 		break;
-	case MLX5_FLOW_NAMESPACE_FDB:
+	case MLX5_FLOW_NAMESPACE_FDB_BYPASS:
 		max_table_size = BIT(
 			MLX5_CAP_ESW_FLOWTABLE_FDB(dev->mdev, log_max_ft_size));
 		if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev->mdev, decap) && esw_encap)
@@ -1546,7 +1546,7 @@ _get_flow_table(struct mlx5_ib_dev *dev,
 	case MLX5_FLOW_NAMESPACE_EGRESS:
 		prio = &dev->flow_db->egress_prios[priority];
 		break;
-	case MLX5_FLOW_NAMESPACE_FDB:
+	case MLX5_FLOW_NAMESPACE_FDB_BYPASS:
 		prio = &dev->flow_db->fdb;
 		break;
 	case MLX5_FLOW_NAMESPACE_RDMA_RX:
@@ -1937,7 +1937,7 @@ mlx5_ib_ft_type_to_namespace(enum mlx5_ib_uapi_flow_table_type table_type,
 		*namespace = MLX5_FLOW_NAMESPACE_EGRESS;
 		break;
 	case MLX5_IB_UAPI_FLOW_TABLE_TYPE_FDB:
-		*namespace = MLX5_FLOW_NAMESPACE_FDB;
+		*namespace = MLX5_FLOW_NAMESPACE_FDB_BYPASS;
 		break;
 	case MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_RX:
 		*namespace = MLX5_FLOW_NAMESPACE_RDMA_RX;
@@ -2029,8 +2029,8 @@ static int get_dests(struct uverbs_attr_bundle *attrs,
 	}
 
 	/* Allow only DEVX object, drop as dest for FDB */
-	if (fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_FDB && !(dest_devx ||
-	     (*flags & MLX5_IB_ATTR_CREATE_FLOW_FLAGS_DROP)))
+	if (fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_FDB_BYPASS &&
+	    !(dest_devx || (*flags & MLX5_IB_ATTR_CREATE_FLOW_FLAGS_DROP)))
 		return -EINVAL;
 
 	/* Allow only DEVX object or QP as dest when inserting to RDMA_RX */
@@ -2050,7 +2050,7 @@ static int get_dests(struct uverbs_attr_bundle *attrs,
 		if (!is_flow_dest(devx_obj, dest_id, dest_type))
 			return -EINVAL;
 		/* Allow only flow table as dest when inserting to FDB or RDMA_RX */
-		if ((fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_FDB ||
+		if ((fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_FDB_BYPASS ||
 		     fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_RDMA_RX) &&
 		    *dest_type != MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE)
 			return -EINVAL;
@@ -2320,7 +2320,7 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD_FLOW_MATCHER_CREATE)(
 	if (err)
 		goto end;
 
-	if (obj->ns_type == MLX5_FLOW_NAMESPACE_FDB &&
+	if (obj->ns_type == MLX5_FLOW_NAMESPACE_FDB_BYPASS &&
 	    mlx5_eswitch_mode(dev->mdev) != MLX5_ESWITCH_OFFLOADS) {
 		err = -EINVAL;
 		goto end;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
index 750b21124a1a..762b9730a897 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
@@ -788,7 +788,8 @@ static int mlx5_cmd_packet_reformat_alloc(struct mlx5_flow_root_namespace *ns,
 	int err;
 	u32 *in;
 
-	if (namespace == MLX5_FLOW_NAMESPACE_FDB)
+	if (namespace == MLX5_FLOW_NAMESPACE_FDB ||
+	    namespace == MLX5_FLOW_NAMESPACE_FDB_BYPASS)
 		max_encap_size = MLX5_CAP_ESW(dev, max_encap_header_size);
 	else
 		max_encap_size = MLX5_CAP_FLOWTABLE(dev, max_encap_header_size);
@@ -860,6 +861,7 @@ static int mlx5_cmd_modify_header_alloc(struct mlx5_flow_root_namespace *ns,
 
 	switch (namespace) {
 	case MLX5_FLOW_NAMESPACE_FDB:
+	case MLX5_FLOW_NAMESPACE_FDB_BYPASS:
 		max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, max_modify_header_actions);
 		table_type = FS_FT_FDB;
 		break;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
index 386ab9a2d490..2d26e16a67cd 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
@@ -2220,6 +2220,7 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,
 
 	switch (type) {
 	case MLX5_FLOW_NAMESPACE_FDB:
+	case MLX5_FLOW_NAMESPACE_FDB_BYPASS:
 		if (steering->fdb_root_ns)
 			return &steering->fdb_root_ns->ns;
 		return NULL;
diff --git a/include/linux/mlx5/fs.h b/include/linux/mlx5/fs.h
index cd2d4c572367..b1aad14689e3 100644
--- a/include/linux/mlx5/fs.h
+++ b/include/linux/mlx5/fs.h
@@ -73,6 +73,7 @@ enum mlx5_flow_namespace_type {
 	MLX5_FLOW_NAMESPACE_KERNEL,
 	MLX5_FLOW_NAMESPACE_LEFTOVERS,
 	MLX5_FLOW_NAMESPACE_ANCHOR,
+	MLX5_FLOW_NAMESPACE_FDB_BYPASS,
 	MLX5_FLOW_NAMESPACE_FDB,
 	MLX5_FLOW_NAMESPACE_ESW_EGRESS,
 	MLX5_FLOW_NAMESPACE_ESW_INGRESS,
-- 
2.31.1

Re: [PATCH mlx5-next 1/4] net/mlx5: Separate FDB namespace

[Leon Romanovsky]

On Wed, Dec 01, 2021 at 11:36:18AM -0800, Saeed Mahameed wrote:
> From: Maor Gottlieb <maorg@nvidia.com>
> 
> This patch doesn't add an additional namespaces, but just separates the
> naming to be used by each FDB user, bypass and kernel.
> Downstream patches will actually split this up and allow to have more
> than single priority for the bypass users.
> 
> Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
> Reviewed-by: Mark Bloch <mbloch@nvidia.com>
> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
> ---
>  drivers/infiniband/hw/mlx5/fs.c                   | 14 +++++++-------
>  drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c  |  4 +++-
>  drivers/net/ethernet/mellanox/mlx5/core/fs_core.c |  1 +
>  include/linux/mlx5/fs.h                           |  1 +
>  4 files changed, 12 insertions(+), 8 deletions(-)
> 

Thanks,
Acked-by: Leon Romanovsky <leonro@nvidia.com>

[PATCH mlx5-next 2/4] net/mlx5: Refactor mlx5_get_flow_namespace

[Saeed Mahameed]

From: Maor Gottlieb <maorg@nvidia.com>

Have all the namespace type check in the same switch case.

Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
 .../net/ethernet/mellanox/mlx5/core/fs_core.c | 44 ++++++++++++++-----
 1 file changed, 32 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
index 2d26e16a67cd..9736f0dd6a49 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
@@ -2206,6 +2206,22 @@ struct mlx5_flow_namespace *mlx5_get_fdb_sub_ns(struct mlx5_core_dev *dev,
 }
 EXPORT_SYMBOL(mlx5_get_fdb_sub_ns);
 
+static bool is_nic_rx_ns(enum mlx5_flow_namespace_type type)
+{
+	switch (type) {
+	case MLX5_FLOW_NAMESPACE_BYPASS:
+	case MLX5_FLOW_NAMESPACE_LAG:
+	case MLX5_FLOW_NAMESPACE_OFFLOADS:
+	case MLX5_FLOW_NAMESPACE_ETHTOOL:
+	case MLX5_FLOW_NAMESPACE_KERNEL:
+	case MLX5_FLOW_NAMESPACE_LEFTOVERS:
+	case MLX5_FLOW_NAMESPACE_ANCHOR:
+		return true;
+	default:
+		return false;
+	}
+}
+
 struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,
 						    enum mlx5_flow_namespace_type type)
 {
@@ -2236,31 +2252,35 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,
 		if (steering->sniffer_tx_root_ns)
 			return &steering->sniffer_tx_root_ns->ns;
 		return NULL;
-	default:
-		break;
-	}
-
-	if (type == MLX5_FLOW_NAMESPACE_EGRESS ||
-	    type == MLX5_FLOW_NAMESPACE_EGRESS_KERNEL) {
+	case MLX5_FLOW_NAMESPACE_EGRESS:
+	case MLX5_FLOW_NAMESPACE_EGRESS_KERNEL:
 		root_ns = steering->egress_root_ns;
 		prio = type - MLX5_FLOW_NAMESPACE_EGRESS;
-	} else if (type == MLX5_FLOW_NAMESPACE_RDMA_RX) {
+		break;
+	case MLX5_FLOW_NAMESPACE_RDMA_RX:
 		root_ns = steering->rdma_rx_root_ns;
 		prio = RDMA_RX_BYPASS_PRIO;
-	} else if (type == MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL) {
+		break;
+	case MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL:
 		root_ns = steering->rdma_rx_root_ns;
 		prio = RDMA_RX_KERNEL_PRIO;
-	} else if (type == MLX5_FLOW_NAMESPACE_RDMA_TX) {
+		break;
+	case MLX5_FLOW_NAMESPACE_RDMA_TX:
 		root_ns = steering->rdma_tx_root_ns;
-	} else if (type == MLX5_FLOW_NAMESPACE_RDMA_RX_COUNTERS) {
+		break;
+	case MLX5_FLOW_NAMESPACE_RDMA_RX_COUNTERS:
 		root_ns = steering->rdma_rx_root_ns;
 		prio = RDMA_RX_COUNTERS_PRIO;
-	} else if (type == MLX5_FLOW_NAMESPACE_RDMA_TX_COUNTERS) {
+		break;
+	case MLX5_FLOW_NAMESPACE_RDMA_TX_COUNTERS:
 		root_ns = steering->rdma_tx_root_ns;
 		prio = RDMA_TX_COUNTERS_PRIO;
-	} else { /* Must be NIC RX */
+		break;
+	default: /* Must be NIC RX */
+		WARN_ON(!is_nic_rx_ns(type));
 		root_ns = steering->root_ns;
 		prio = type;
+		break;
 	}
 
 	if (!root_ns)
-- 
2.31.1

Re: [PATCH mlx5-next 2/4] net/mlx5: Refactor mlx5_get_flow_namespace

[Leon Romanovsky]

On Wed, Dec 01, 2021 at 11:36:19AM -0800, Saeed Mahameed wrote:
> From: Maor Gottlieb <maorg@nvidia.com>
> 
> Have all the namespace type check in the same switch case.
> 
> Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
> Reviewed-by: Mark Bloch <mbloch@nvidia.com>
> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
> ---
>  .../net/ethernet/mellanox/mlx5/core/fs_core.c | 44 ++++++++++++++-----
>  1 file changed, 32 insertions(+), 12 deletions(-)
> 

Thanks,
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>

[PATCH mlx5-next 3/4] net/mlx5: Create more priorities for FDB bypass namespace

[Saeed Mahameed]

From: Maor Gottlieb <maorg@nvidia.com>

Create 16 flow steering priorities for FDB bypass users.

Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
 .../net/ethernet/mellanox/mlx5/core/fs_core.c | 35 +++++++++++++++----
 1 file changed, 29 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
index 9736f0dd6a49..a8671d7b7ca8 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
@@ -2236,7 +2236,6 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,
 
 	switch (type) {
 	case MLX5_FLOW_NAMESPACE_FDB:
-	case MLX5_FLOW_NAMESPACE_FDB_BYPASS:
 		if (steering->fdb_root_ns)
 			return &steering->fdb_root_ns->ns;
 		return NULL;
@@ -2252,6 +2251,10 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,
 		if (steering->sniffer_tx_root_ns)
 			return &steering->sniffer_tx_root_ns->ns;
 		return NULL;
+	case MLX5_FLOW_NAMESPACE_FDB_BYPASS:
+		root_ns = steering->fdb_root_ns;
+		prio =  FDB_BYPASS_PATH;
+		break;
 	case MLX5_FLOW_NAMESPACE_EGRESS:
 	case MLX5_FLOW_NAMESPACE_EGRESS_KERNEL:
 		root_ns = steering->egress_root_ns;
@@ -2843,6 +2846,28 @@ static int create_fdb_fast_path(struct mlx5_flow_steering *steering)
 	return 0;
 }
 
+static int create_fdb_bypass(struct mlx5_flow_steering *steering)
+{
+	struct mlx5_flow_namespace *ns;
+	struct fs_prio *prio;
+	int i;
+
+	prio = fs_create_prio(&steering->fdb_root_ns->ns, FDB_BYPASS_PATH, 0);
+	if (IS_ERR(prio))
+		return PTR_ERR(prio);
+
+	ns = fs_create_namespace(prio, MLX5_FLOW_TABLE_MISS_ACTION_DEF);
+	if (IS_ERR(ns))
+		return PTR_ERR(ns);
+
+	for (i = 0; i < MLX5_BY_PASS_NUM_REGULAR_PRIOS; i++) {
+		prio = fs_create_prio(ns, i, 1);
+		if (IS_ERR(prio))
+			return PTR_ERR(prio);
+	}
+	return 0;
+}
+
 static int init_fdb_root_ns(struct mlx5_flow_steering *steering)
 {
 	struct fs_prio *maj_prio;
@@ -2852,12 +2877,10 @@ static int init_fdb_root_ns(struct mlx5_flow_steering *steering)
 	if (!steering->fdb_root_ns)
 		return -ENOMEM;
 
-	maj_prio = fs_create_prio(&steering->fdb_root_ns->ns, FDB_BYPASS_PATH,
-				  1);
-	if (IS_ERR(maj_prio)) {
-		err = PTR_ERR(maj_prio);
+	err = create_fdb_bypass(steering);
+	if (err)
 		goto out_err;
-	}
+
 	err = create_fdb_fast_path(steering);
 	if (err)
 		goto out_err;
-- 
2.31.1

Re: [PATCH mlx5-next 3/4] net/mlx5: Create more priorities for FDB bypass namespace

[Leon Romanovsky]

On Wed, Dec 01, 2021 at 11:36:20AM -0800, Saeed Mahameed wrote:
> From: Maor Gottlieb <maorg@nvidia.com>
> 
> Create 16 flow steering priorities for FDB bypass users.
> 
> Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
> Reviewed-by: Mark Bloch <mbloch@nvidia.com>
> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
> ---
>  .../net/ethernet/mellanox/mlx5/core/fs_core.c | 35 +++++++++++++++----
>  1 file changed, 29 insertions(+), 6 deletions(-)
> 

Thanks,
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>

[PATCH mlx5-next 4/4] RDMA/mlx5: Add support to multiple priorities for FDB rules

[Saeed Mahameed]

From: Maor Gottlieb <maorg@nvidia.com>

Currently, the driver ignores the user's priority for flow steering
rules in FDB namespace. Change it and create the rule in the right
priority.
It will allow to create FDB steering rules in up to 16 different
priorities.

Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
 drivers/infiniband/hw/mlx5/fs.c      | 4 ++--
 drivers/infiniband/hw/mlx5/mlx5_ib.h | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/infiniband/hw/mlx5/fs.c b/drivers/infiniband/hw/mlx5/fs.c
index 510ef85ef6e4..661ed2b44508 100644
--- a/drivers/infiniband/hw/mlx5/fs.c
+++ b/drivers/infiniband/hw/mlx5/fs.c
@@ -1517,7 +1517,7 @@ _get_flow_table(struct mlx5_ib_dev *dev,
 					       reformat_l3_tunnel_to_l2) &&
 		    esw_encap)
 			flags |= MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;
-		priority = FDB_BYPASS_PATH;
+		priority = fs_matcher->priority;
 		break;
 	case MLX5_FLOW_NAMESPACE_RDMA_RX:
 		max_table_size = BIT(
@@ -1547,7 +1547,7 @@ _get_flow_table(struct mlx5_ib_dev *dev,
 		prio = &dev->flow_db->egress_prios[priority];
 		break;
 	case MLX5_FLOW_NAMESPACE_FDB_BYPASS:
-		prio = &dev->flow_db->fdb;
+		prio = &dev->flow_db->fdb[priority];
 		break;
 	case MLX5_FLOW_NAMESPACE_RDMA_RX:
 		prio = &dev->flow_db->rdma_rx[priority];
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index e636e954f6bf..e3c33be9c5a0 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -232,6 +232,7 @@ enum {
 #define MLX5_IB_NUM_FLOW_FT		(MLX5_IB_FLOW_LEFTOVERS_PRIO + 1)
 #define MLX5_IB_NUM_SNIFFER_FTS		2
 #define MLX5_IB_NUM_EGRESS_FTS		1
+#define MLX5_IB_NUM_FDB_FTS		MLX5_BY_PASS_NUM_REGULAR_PRIOS
 struct mlx5_ib_flow_prio {
 	struct mlx5_flow_table		*flow_table;
 	unsigned int			refcount;
@@ -276,7 +277,7 @@ struct mlx5_ib_flow_db {
 	struct mlx5_ib_flow_prio	egress_prios[MLX5_IB_NUM_FLOW_FT];
 	struct mlx5_ib_flow_prio	sniffer[MLX5_IB_NUM_SNIFFER_FTS];
 	struct mlx5_ib_flow_prio	egress[MLX5_IB_NUM_EGRESS_FTS];
-	struct mlx5_ib_flow_prio	fdb;
+	struct mlx5_ib_flow_prio	fdb[MLX5_IB_NUM_FDB_FTS];
 	struct mlx5_ib_flow_prio	rdma_rx[MLX5_IB_NUM_FLOW_FT];
 	struct mlx5_ib_flow_prio	rdma_tx[MLX5_IB_NUM_FLOW_FT];
 	struct mlx5_ib_flow_prio	opfcs[MLX5_IB_OPCOUNTER_MAX];
-- 
2.31.1

Re: [PATCH mlx5-next 4/4] RDMA/mlx5: Add support to multiple priorities for FDB rules

[Leon Romanovsky]

On Wed, Dec 01, 2021 at 11:36:21AM -0800, Saeed Mahameed wrote:
> From: Maor Gottlieb <maorg@nvidia.com>
> 
> Currently, the driver ignores the user's priority for flow steering
> rules in FDB namespace. Change it and create the rule in the right
> priority.
> It will allow to create FDB steering rules in up to 16 different
> priorities.
> 
> Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
> Reviewed-by: Mark Bloch <mbloch@nvidia.com>
> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
> ---
>  drivers/infiniband/hw/mlx5/fs.c      | 4 ++--
>  drivers/infiniband/hw/mlx5/mlx5_ib.h | 3 ++-
>  2 files changed, 4 insertions(+), 3 deletions(-)
> 

Thanks,
Acked-by: Leon Romanovsky <leonro@nvidia.com>

Re: [PATCH mlx5-next 0/4] Add support to multiple RDMA priorities for FDB rules

[Jason Gunthorpe]

On Wed, Dec 01, 2021 at 11:36:17AM -0800, Saeed Mahameed wrote:
> From: Saeed Mahameed <saeedm@nvidia.com>
> 
> Currently, the driver ignores the user's priority for flow steering
> rules in FDB namespace. Change it and create the rule in the right
> priority.
> 
> It will allow to create FDB steering rules in up to 16 different
> priorities.
> 
> Maor Gottlieb (4):
>   net/mlx5: Separate FDB namespace
>   net/mlx5: Refactor mlx5_get_flow_namespace
>   net/mlx5: Create more priorities for FDB bypass namespace
>   RDMA/mlx5: Add support to multiple priorities for FDB rules
> 
>  drivers/infiniband/hw/mlx5/fs.c               | 18 ++---
>  drivers/infiniband/hw/mlx5/mlx5_ib.h          |  3 +-
>  .../net/ethernet/mellanox/mlx5/core/fs_cmd.c  |  4 +-
>  .../net/ethernet/mellanox/mlx5/core/fs_core.c | 76 +++++++++++++++----
>  include/linux/mlx5/fs.h                       |  1 +
>  5 files changed, 75 insertions(+), 27 deletions(-)

Did you want this to go to the rdma tree? If so it seems fine, please
update the shared branch

Thanks,
Jason

Re: [PATCH mlx5-next 0/4] Add support to multiple RDMA priorities for FDB rules

[Saeed Mahameed]

On Tue, 2021-12-07 at 14:58 -0400, Jason Gunthorpe wrote:
> On Wed, Dec 01, 2021 at 11:36:17AM -0800, Saeed Mahameed wrote:
> > From: Saeed Mahameed <saeedm@nvidia.com>
> > 
> > Currently, the driver ignores the user's priority for flow steering
> > rules in FDB namespace. Change it and create the rule in the right
> > priority.
> > 
> > It will allow to create FDB steering rules in up to 16 different
> > priorities.
> > 
> > Maor Gottlieb (4):
> >   net/mlx5: Separate FDB namespace
> >   net/mlx5: Refactor mlx5_get_flow_namespace
> >   net/mlx5: Create more priorities for FDB bypass namespace
> >   RDMA/mlx5: Add support to multiple priorities for FDB rules
> > 
> >  drivers/infiniband/hw/mlx5/fs.c               | 18 ++---
> >  drivers/infiniband/hw/mlx5/mlx5_ib.h          |  3 +-
> >  .../net/ethernet/mellanox/mlx5/core/fs_cmd.c  |  4 +-
> >  .../net/ethernet/mellanox/mlx5/core/fs_core.c | 76
> > +++++++++++++++----
> >  include/linux/mlx5/fs.h                       |  1 +
> >  5 files changed, 75 insertions(+), 27 deletions(-)
> 
> Did you want this to go to the rdma tree? If so it seems fine, please
> update the shared branch
> 

Yes, applied.

Re: [PATCH mlx5-next 0/4] Add support to multiple RDMA priorities for FDB rules

[Jason Gunthorpe]

On Tue, Dec 14, 2021 at 12:04:09AM +0000, Saeed Mahameed wrote:
> On Tue, 2021-12-07 at 14:58 -0400, Jason Gunthorpe wrote:
> > On Wed, Dec 01, 2021 at 11:36:17AM -0800, Saeed Mahameed wrote:
> > > From: Saeed Mahameed <saeedm@nvidia.com>
> > > 
> > > Currently, the driver ignores the user's priority for flow steering
> > > rules in FDB namespace. Change it and create the rule in the right
> > > priority.
> > > 
> > > It will allow to create FDB steering rules in up to 16 different
> > > priorities.
> > > 
> > > Maor Gottlieb (4):
> > >   net/mlx5: Separate FDB namespace
> > >   net/mlx5: Refactor mlx5_get_flow_namespace
> > >   net/mlx5: Create more priorities for FDB bypass namespace
> > >   RDMA/mlx5: Add support to multiple priorities for FDB rules
> > > 
> > >  drivers/infiniband/hw/mlx5/fs.c               | 18 ++---
> > >  drivers/infiniband/hw/mlx5/mlx5_ib.h          |  3 +-
> > >  .../net/ethernet/mellanox/mlx5/core/fs_cmd.c  |  4 +-
> > >  .../net/ethernet/mellanox/mlx5/core/fs_core.c | 76
> > > +++++++++++++++----
> > >  include/linux/mlx5/fs.h                       |  1 +
> > >  5 files changed, 75 insertions(+), 27 deletions(-)
> > 
> > Did you want this to go to the rdma tree? If so it seems fine, please
> > update the shared branch
> > 
> 
> Yes, applied.

Okay, pulled, thanks

Jason