From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 718A9C433EF for ; Tue, 18 Jan 2022 03:47:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354541AbiARDrC (ORCPT ); Mon, 17 Jan 2022 22:47:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347192AbiARCkz (ORCPT ); Mon, 17 Jan 2022 21:40:55 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59CD0C08C5C1; Mon, 17 Jan 2022 18:36:30 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 9DE6BB8124E; Tue, 18 Jan 2022 02:36:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3AE8EC36AF6; Tue, 18 Jan 2022 02:36:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1642473388; bh=oApYUgwpm7sP2/MB1uTCxP0eGg8ajqHEVrPO6uprhBs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GkcP/gRbphPahqK0mY9WGv7bdyD3QuzbQ+U3cbaOq/aA7XyA4jCbywamJM1LcOjMA oiZ/aCOWdpcB2auof3LK1gPM6US55+loivfXEtp8Sa1QpC5yWMF0aOuAqbVtjjOev6 crmDIvns+I7HraBOWMbjPIi4MyNFBJU+7ue9Z4i6lRLyq7BaVNBDyFBHGz87YR+NDa ButnGDgdDcSvWE5tiX4NFACA65laPzlpqU6w9j6vYeA8RQZxJenc66zic/IMMdVW/V dWTcthKYJHs2BXsTpsE89i5cXDG5xRvXZ3Dpgo2L9VSYu4C+71wPkzeCgEowr2RyVu pvrWKqadwBGSA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: "Russell King (Oracle)" , Tom Lendacky , Andrew Lunn , Florian Fainelli , Jakub Kicinski , Sasha Levin , hkallweit1@gmail.com, davem@davemloft.net, netdev@vger.kernel.org Subject: [PATCH AUTOSEL 5.15 097/188] net: phy: prefer 1000baseT over 1000baseKX Date: Mon, 17 Jan 2022 21:30:21 -0500 Message-Id: <20220118023152.1948105-97-sashal@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220118023152.1948105-1-sashal@kernel.org> References: <20220118023152.1948105-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: "Russell King (Oracle)" [ Upstream commit f20f94f7f52c4685c81754f489ffcc72186e8bdb ] The PHY settings table is supposed to be sorted by descending match priority - in other words, earlier entries are preferred over later entries. The order of 1000baseKX/Full and 1000baseT/Full is such that we prefer 1000baseKX/Full over 1000baseT/Full, but 1000baseKX/Full is a lot rarer than 1000baseT/Full, and thus is much less likely to be preferred. This causes phylink problems - it means a fixed link specifying a speed of 1G and full duplex gets an ethtool linkmode of 1000baseKX/Full rather than 1000baseT/Full as would be expected - and since we offer userspace a software emulation of a conventional copper PHY, we want to offer copper modes in preference to anything else. However, we do still want to allow the rarer modes as well. Hence, let's reorder these two modes to prefer copper. Tested-by: Tom Lendacky Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn Reported-by: Florian Fainelli Link: https://lore.kernel.org/r/E1muvFO-00F6jY-1K@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski Signed-off-by: Sasha Levin --- drivers/net/phy/phy-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c index 2870c33b8975d..271fc01f7f7fd 100644 --- a/drivers/net/phy/phy-core.c +++ b/drivers/net/phy/phy-core.c @@ -162,11 +162,11 @@ static const struct phy_setting settings[] = { PHY_SETTING( 2500, FULL, 2500baseT_Full ), PHY_SETTING( 2500, FULL, 2500baseX_Full ), /* 1G */ - PHY_SETTING( 1000, FULL, 1000baseKX_Full ), PHY_SETTING( 1000, FULL, 1000baseT_Full ), PHY_SETTING( 1000, HALF, 1000baseT_Half ), PHY_SETTING( 1000, FULL, 1000baseT1_Full ), PHY_SETTING( 1000, FULL, 1000baseX_Full ), + PHY_SETTING( 1000, FULL, 1000baseKX_Full ), /* 100M */ PHY_SETTING( 100, FULL, 100baseT_Full ), PHY_SETTING( 100, FULL, 100baseT1_Full ), -- 2.34.1