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From: Andy Chiu <andy.chiu@sifive.com>
To: davem@davemloft.net, michal.simek@xilinx.com,
	radhey.shyam.pandey@xilinx.com
Cc: andrew@lunn.ch, kuba@kernel.org, pabeni@redhat.com,
	robh+dt@kernel.org, krzk+dt@kernel.org, linux@armlinux.org.uk,
	netdev@vger.kernel.org, devicetree@vger.kernel.org,
	Andy Chiu <andy.chiu@sifive.com>,
	Greentime Hu <greentime.hu@sifive.com>,
	Rob Herring <robh@kernel.org>
Subject: [PATCH v8 net-next 3/4] dt-bindings: net: add pcs-handle attribute
Date: Tue,  5 Apr 2022 17:19:28 +0800	[thread overview]
Message-ID: <20220405091929.670951-4-andy.chiu@sifive.com> (raw)
In-Reply-To: <20220405091929.670951-1-andy.chiu@sifive.com>

Document the new pcs-handle attribute to support connecting to an
external PHY. For Xilinx's AXI Ethernet, this is used when the core
operates in SGMII or 1000Base-X modes and links through the internal
PCS/PMA PHY.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/net/ethernet-controller.yaml      | 6 ++++++
 Documentation/devicetree/bindings/net/xilinx_axienet.txt  | 8 +++++++-
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
index 817794e56227..4f15463611f8 100644
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
@@ -106,6 +106,12 @@ properties:
   phy-mode:
     $ref: "#/properties/phy-connection-type"
 
+  pcs-handle:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Specifies a reference to a node representing a PCS PHY device on a MDIO
+      bus to link with an external PHY (phy-handle) if exists.
+
   phy-handle:
     $ref: /schemas/types.yaml#/definitions/phandle
     description:
diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
index b8e4894bc634..1aa4c6006cd0 100644
--- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
+++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
@@ -26,7 +26,8 @@ Required properties:
 		  specified, the TX/RX DMA interrupts should be on that node
 		  instead, and only the Ethernet core interrupt is optionally
 		  specified here.
-- phy-handle	: Should point to the external phy device.
+- phy-handle	: Should point to the external phy device if exists. Pointing
+		  this to the PCS/PMA PHY is deprecated and should be avoided.
 		  See ethernet.txt file in the same directory.
 - xlnx,rxmem	: Set to allocated memory buffer for Rx/Tx in the hardware
 
@@ -68,6 +69,11 @@ Optional properties:
 		  required through the core's MDIO interface (i.e. always,
 		  unless the PHY is accessed through a different bus).
 
+ - pcs-handle: 	  Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
+		  modes, where "pcs-handle" should be used to point
+		  to the PCS/PMA PHY, and "phy-handle" should point to an
+		  external PHY if exists.
+
 Example:
 	axi_ethernet_eth: ethernet@40c00000 {
 		compatible = "xlnx,axi-ethernet-1.00.a";
-- 
2.34.1


  parent reply	other threads:[~2022-04-05 10:52 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-05  9:19 [PATCH v8 net-next 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
2022-04-05  9:19 ` [PATCH v8 net-next 1/4] net: axienet: setup mdio unconditionally Andy Chiu
2022-04-05 12:00   ` Radhey Shyam Pandey
2022-04-05 12:16   ` Andrew Lunn
2022-04-05  9:19 ` [PATCH v8 net-next 2/4] net: axienet: factor out phy_node in struct axienet_local Andy Chiu
2022-04-05 12:09   ` Radhey Shyam Pandey
2022-04-05 12:17   ` Andrew Lunn
2022-04-05  9:19 ` Andy Chiu [this message]
2022-04-05 12:18   ` [PATCH v8 net-next 3/4] dt-bindings: net: add pcs-handle attribute Andrew Lunn
2022-04-05  9:19 ` [PATCH v8 net-next 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
2022-04-05 12:18   ` Andrew Lunn
2022-04-05 12:23   ` Radhey Shyam Pandey
2022-04-06 13:10 ` [PATCH v8 net-next 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode patchwork-bot+netdevbpf

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