Re: [PATCH net-next 4/5] net: dt-bindings: Introduce the Qualcomm IPQESS Ethernet controller

Krzysztof Kozlowski
2022-04-23T17:49:52Z

On 22/04/2022 20:03, Maxime Chevallier wrote:
> Add the DT binding for the IPQESS Ethernet Controller. This is a simple
> controller, only requiring the phy-mode, interrupts, clocks, and
> possibly a MAC address setting.
>
> Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
> ---
> .../devicetree/bindings/net/qcom,ipqess.yaml | 94 +++++++++++++++++++
> 1 file changed, 94 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/qcom,ipqess.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipqess.yaml b/Documentation/devicetree/bindings/net/qcom,ipqess.yaml
> new file mode 100644
> index 000000000000..8fec5633692f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/qcom,ipqess.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/qcom,ipqess.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm IPQ ESS EDMA Ethernet Controller Device Tree Bindings

s/Device Tree Bindings//

> +
> +allOf:
> + - $ref: "ethernet-controller.yaml#"

allOf goes after maintainers.

> +
> +maintainers:
> + - Maxime Chevallier <maxime.chevallier@bootlin.com>
> +
> +properties:
> + compatible:
> + const: qcom,ipq4019e-ess-edma
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + minItems: 2
> + maxItems: 32
> + description: One interrupt per tx and rx queue, with up to 16 queues.
> +
> + clocks:
> + maxItems: 1
> +
> + phy-mode: true
> +
> + fixed-link: true
> +
> + mac-address: true

You don't need all these three. They come from ethernet-controller and
you use unevaluatedProperties.

> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - phy-mode
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + gmac: ethernet@c080000 {
> + compatible = "qcom,ipq4019-ess-edma";
> + reg = <0xc080000 0x8000>;
> + interrupts = <GIC_SPI 65 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 69 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 71 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 244 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 246 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 251 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 252 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 253 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 254 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>;
> +
> + status = "okay";

No status in the example.

> +
> + phy-mode = "internal";
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + pause;
> + asym-pause;
> + };
> + };
> +
> +...

Best regards,
Krzysztof