From: Oleksij Rempel <o.rempel@pengutronix.de>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Woojung Huh <woojung.huh@microchip.com>,
UNGLinuxDriver@microchip.com,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
kernel@pengutronix.de, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org
Subject: Re: [PATCH net v1 1/1] net: dsa: microchip: don't try do read Gbit registers on non Gbit chips
Date: Thu, 28 Jul 2022 15:33:36 +0200 [thread overview]
Message-ID: <20220728133336.GA30201@pengutronix.de> (raw)
In-Reply-To: <YuKOTzS89D2+O8Ye@lunn.ch>
On Thu, Jul 28, 2022 at 03:25:35PM +0200, Andrew Lunn wrote:
> On Thu, Jul 28, 2022 at 03:17:25PM +0200, Oleksij Rempel wrote:
> > Do not try to read not existing or wrong register on chips without
> > GBIT_SUPPORT.
> >
> > Fixes: c2e866911e25 ("net: dsa: microchip: break KSZ9477 DSA driver into two files")
> > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> > ---
> > drivers/net/dsa/microchip/ksz9477.c | 8 +++++++-
> > 1 file changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c
> > index c73bb6d383ad..f6bbd9646c85 100644
> > --- a/drivers/net/dsa/microchip/ksz9477.c
> > +++ b/drivers/net/dsa/microchip/ksz9477.c
> > @@ -316,7 +316,13 @@ void ksz9477_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data)
> > break;
> > }
> > } else {
> > - ksz_pread16(dev, addr, 0x100 + (reg << 1), &val);
> > + /* No gigabit support. Do not read wrong registers. */
> > + if (!(dev->features & GBIT_SUPPORT) &&
> > + (reg == MII_CTRL1000 || reg == MII_ESTATUS ||
> > + reg == MII_STAT1000))
>
> Does this actually happen?
Yes. I just discovered it after adding regmap ranges validation for
KSZ9893 chip.
>
> If i remember this code correctly, it tries to make the oddly looking
> PHY look like a normal PHY. phylib is then used to drive the PHY?
>
> If i have that correct, why is phylib trying to read these registers?
> It should know there is no 1G support, and should skip them.
I didn't investigated it so far. Will try to look deeper tomorrow.
Regards,
Oleksij
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next prev parent reply other threads:[~2022-07-28 13:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-28 13:17 [PATCH net v1 1/1] net: dsa: microchip: don't try do read Gbit registers on non Gbit chips Oleksij Rempel
2022-07-28 13:25 ` Andrew Lunn
2022-07-28 13:33 ` Oleksij Rempel [this message]
2022-07-29 9:05 ` Oleksij Rempel
2022-07-29 13:12 ` Andrew Lunn
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