From: David Yang <mmyangfl@gmail.com>
To: mmyangfl@gmail.com
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3] net: mv643xx_eth: support MII/GMII/RGMII modes for Kirkwood
Date: Sat, 1 Oct 2022 05:35:34 +0800 [thread overview]
Message-ID: <20220930213534.962336-1-mmyangfl@gmail.com> (raw)
In-Reply-To: <YzdaAlg77SyrgjE3@lunn.ch>
Support mode switch properly, which is not available before.
If SoC has two Ethernet controllers, by setting both of them into MII
mode, the first controller enters GMII mode, while the second
controller is effectively disabled. This requires configuring (and
maybe enabling) the second controller in the device tree, even though
it cannot be used.
Signed-off-by: David Yang <mmyangfl@gmail.com>
---
v2: clarify modes work on controllers, read default value from PSC1
v3: Kirkwood only
drivers/net/ethernet/marvell/mv643xx_eth.c | 48 ++++++++++++++++++++--
1 file changed, 44 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c
index b6be0552a..355bb8ba7 100644
--- a/drivers/net/ethernet/marvell/mv643xx_eth.c
+++ b/drivers/net/ethernet/marvell/mv643xx_eth.c
@@ -108,6 +108,7 @@ static char mv643xx_eth_driver_version[] = "1.4";
#define TXQ_COMMAND 0x0048
#define TXQ_FIX_PRIO_CONF 0x004c
#define PORT_SERIAL_CONTROL1 0x004c
+#define RGMII_EN 0x00000008
#define CLK125_BYPASS_EN 0x00000010
#define TX_BW_RATE 0x0050
#define TX_BW_MTU 0x0058
@@ -367,6 +368,7 @@ struct mv643xx_eth_private {
struct mv643xx_eth_shared_private *shared;
void __iomem *base;
int port_num;
+ bool kirkwood;
struct net_device *dev;
@@ -1215,6 +1217,7 @@ static void mv643xx_eth_adjust_link(struct net_device *dev)
DISABLE_AUTO_NEG_SPEED_GMII |
DISABLE_AUTO_NEG_FOR_FLOW_CTRL |
DISABLE_AUTO_NEG_FOR_DUPLEX;
+ u32 psc1r;
if (dev->phydev->autoneg == AUTONEG_ENABLE) {
/* enable auto negotiation */
@@ -1245,6 +1248,36 @@ static void mv643xx_eth_adjust_link(struct net_device *dev)
out_write:
wrlp(mp, PORT_SERIAL_CONTROL, pscr);
+
+ if (mp->kirkwood) {
+ psc1r = rdlp(mp, PORT_SERIAL_CONTROL1);
+ /* On Kirkwood with two Ethernet controllers, if both of them
+ * have RGMII_EN disabled, the first controller will be in GMII
+ * mode and the second one is effectively disabled, instead of
+ * two MII interfaces.
+ *
+ * To enable GMII in the first controller, the second one must
+ * also be configured (and may be enabled) with RGMII_EN
+ * disabled too, even though it cannot be used at all.
+ */
+ switch (dev->phydev->interface) {
+ case PHY_INTERFACE_MODE_MII:
+ case PHY_INTERFACE_MODE_GMII:
+ psc1r &= ~RGMII_EN;
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ psc1r |= RGMII_EN;
+ break;
+ default:
+ /* Unknown; don't touch */
+ break;
+ }
+
+ wrlp(mp, PORT_SERIAL_CONTROL1, psc1r);
+ }
}
/* statistics ***************************************************************/
@@ -2975,11 +3008,16 @@ static int get_phy_mode(struct mv643xx_eth_private *mp)
if (dev->of_node)
err = of_get_phy_mode(dev->of_node, &iface);
- /* Historical default if unspecified. We could also read/write
- * the interface state in the PSC1
+ /* Read the interface state in the PSC1.
+ *
+ * Modes of two devices may interact on Kirkwood. Currently there is no
+ * way to detect another device within this scope; blindly set MII
+ * here.
*/
if (!dev->of_node || err)
- iface = PHY_INTERFACE_MODE_GMII;
+ iface = rdlp(mp, PORT_SERIAL_CONTROL1) & RGMII_EN ?
+ PHY_INTERFACE_MODE_RGMII : mp->kirkwood ?
+ PHY_INTERFACE_MODE_MII : PHY_INTERFACE_MODE_GMII;
return iface;
}
@@ -3124,9 +3162,11 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
* all other SoCs/System Controllers using this driver.
*/
if (of_device_is_compatible(pdev->dev.of_node,
- "marvell,kirkwood-eth-port"))
+ "marvell,kirkwood-eth-port")) {
wrlp(mp, PORT_SERIAL_CONTROL1,
rdlp(mp, PORT_SERIAL_CONTROL1) & ~CLK125_BYPASS_EN);
+ mp->kirkwood = 1;
+ }
/*
* Start with a default rate, and if there is a clock, allow
--
2.35.1
next prev parent reply other threads:[~2022-09-30 21:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-30 19:49 [PATCH] net: mv643xx_eth: support MII/GMII/RGMII modes David Yang
2022-09-30 20:28 ` Andrew Lunn
2022-09-30 20:39 ` [PATCH v2] " David Yang
2022-10-04 8:52 ` Paolo Abeni
2022-09-30 20:47 ` [PATCH] " Yangfl
2022-09-30 21:05 ` Andrew Lunn
2022-09-30 21:35 ` David Yang [this message]
2022-09-30 22:25 ` [PATCH v4] net: mv643xx_eth: support MII/GMII/RGMII modes for Kirkwood David Yang
2022-10-01 0:59 ` Jakub Kicinski
2022-10-01 8:42 ` [PATCH v5] " David Yang
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