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From: "Marek Behún" <kabel@kernel.org>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: linux@armlinux.org.uk, andrew@lunn.ch, hkallweit1@gmail.com,
	davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	pabeni@redhat.com, netdev@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH RFC 2/3] net: phy: marvell10g: Add host interface speed configuration
Date: Wed, 19 Oct 2022 12:48:39 +0200	[thread overview]
Message-ID: <20221019124839.33ad3458@dellmb> (raw)
In-Reply-To: <20221019085052.933385-3-yoshihiro.shimoda.uh@renesas.com>

On Wed, 19 Oct 2022 17:50:51 +0900
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote:

> Add support for selecting host speed mode. For now, only support
> 1000M bps.
> 
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
>  drivers/net/phy/marvell10g.c | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
> index 383a9c9f36e5..daf3242c6078 100644
> --- a/drivers/net/phy/marvell10g.c
> +++ b/drivers/net/phy/marvell10g.c
> @@ -101,6 +101,10 @@ enum {
>  	MV_AN_21X0_SERDES_CTRL2_AUTO_INIT_DIS	= BIT(13),
>  	MV_AN_21X0_SERDES_CTRL2_RUN_INIT	= BIT(15),
>  
> +	MV_MOD_CONF		= 0xf000,
> +	MV_MOD_CONF_SPEED_MASK	= 0x00c0,
> +	MV_MOD_CONF_SPEED_1000	= BIT(7),
> +

Where did you get these values from? My documentation says:
  Mode Configuration
  Device 31, Register 0xF000
  Bits
  7:6   Reserved  R/W  0x3  This must always be 11.


>  	/* These registers appear at 0x800X and 0xa00X - the 0xa00X control
>  	 * registers appear to set themselves to the 0x800X when AN is
>  	 * restarted, but status registers appear readable from either.
> @@ -147,6 +151,7 @@ struct mv3310_chip {
>  	int (*get_mactype)(struct phy_device *phydev);
>  	int (*set_mactype)(struct phy_device *phydev, int mactype);
>  	int (*select_mactype)(unsigned long *interfaces);
> +	int (*set_macspeed)(struct phy_device *phydev, int macspeed);
>  	int (*init_interface)(struct phy_device *phydev, int mactype);
>  
>  #ifdef CONFIG_HWMON
> @@ -644,6 +649,16 @@ static int mv2110_select_mactype(unsigned long *interfaces)
>  		return -1;
>  }
>  
> +static int mv2110_set_macspeed(struct phy_device *phydev, int macspeed)
> +{
> +	if (macspeed != SPEED_1000)
> +		return -EOPNOTSUPP;
> +
> +	return phy_modify_mmd(phydev, MDIO_MMD_VEND2, MV_MOD_CONF,
> +			      MV_MOD_CONF_SPEED_MASK,
> +			      MV_MOD_CONF_SPEED_1000);
> +}

Why not also support other speeds, if we are doing this already?

Marek

  reply	other threads:[~2022-10-19 13:36 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-19  8:50 [PATCH RFC 0/3] net: phy: marvell10g: Add host speed setting by an ethernet driver Yoshihiro Shimoda
2022-10-19  8:50 ` [PATCH RFC 1/3] net: mdio: Add of_phy_connect_with_host_param() Yoshihiro Shimoda
2022-10-19  8:50 ` [PATCH RFC 2/3] net: phy: marvell10g: Add host interface speed configuration Yoshihiro Shimoda
2022-10-19 10:48   ` Marek Behún [this message]
2022-10-19 10:55     ` Marek Behún
2022-10-19 11:58     ` Russell King (Oracle)
2022-10-20  1:26       ` Yoshihiro Shimoda
2022-10-20  1:15     ` Yoshihiro Shimoda
2022-10-19  8:50 ` [PATCH RFC 3/3] net: renesas: rswitch: Pass host parameters to phydev Yoshihiro Shimoda
2022-10-19 10:41   ` Marek Behún
2022-10-20  0:40     ` Yoshihiro Shimoda
2022-10-19 10:44 ` [PATCH RFC 0/3] net: phy: marvell10g: Add host speed setting by an ethernet driver Marek Behún
2022-10-19 11:39   ` Russell King (Oracle)
2022-10-20  1:20     ` Yoshihiro Shimoda
2022-10-20  1:04   ` Yoshihiro Shimoda

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