From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D68F1C43219 for ; Fri, 4 Nov 2022 14:34:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231714AbiKDOet (ORCPT ); Fri, 4 Nov 2022 10:34:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231651AbiKDOe0 (ORCPT ); Fri, 4 Nov 2022 10:34:26 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F5217652 for ; Fri, 4 Nov 2022 07:31:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667572311; x=1699108311; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0sW/ZIgZwISjF6VkF9jyynxHwA8Hsk3JfPVM7VMfu5U=; b=PcxRj/xXre+9D09Kpw5fmGhBe39sFpGtYuCCDWUwM9ZPZGejAtT/dQxP w15JWfXu5zolsR20RbXnk9DaCCoDMTneNPBkxYpJJBLS8Yz5yZnX2vA7f fwm6CRtP4lIMYwv9ScgxSamim8ocOEF+px/qCC1tYROZEBtIGoNU35SK1 PX10nDZR88zc3s9li8zQ0bpmgu0UfInnKsq8gfLu4E1lb7sPoiz2udNqz 8WN4gm9NE7UA0Qd6QYRW/IQK3EiMvYCWHC73PYV2+87ElJdt4dJI9M1hJ PniPoztWju4zaFJjSz9Pu3JLx2RD0xKRTEodl+WKoukDdxkzKSQzFn2QW w==; X-IronPort-AV: E=McAfee;i="6500,9779,10521"; a="290367557" X-IronPort-AV: E=Sophos;i="5.96,137,1665471600"; d="scan'208";a="290367557" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2022 07:31:47 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10521"; a="777730384" X-IronPort-AV: E=Sophos;i="5.96,137,1665471600"; d="scan'208";a="777730384" Received: from unknown (HELO fedora.igk.intel.com) ([10.123.220.6]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2022 07:31:45 -0700 From: Michal Wilczynski To: netdev@vger.kernel.org Cc: alexandr.lobakin@intel.com, jacob.e.keller@intel.com, jesse.brandeburg@intel.com, przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com, kuba@kernel.org, ecree.xilinx@gmail.com, jiri@resnulli.us, Michal Wilczynski Subject: [PATCH net-next v9 9/9] ice: Prevent ADQ, DCB coexistence with Custom Tx scheduler Date: Fri, 4 Nov 2022 15:31:02 +0100 Message-Id: <20221104143102.1120076-10-michal.wilczynski@intel.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221104143102.1120076-1-michal.wilczynski@intel.com> References: <20221104143102.1120076-1-michal.wilczynski@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org ADQ, DCB might interfere with Custom Tx Scheduler changes that user might introduce using devlink-rate API. Check if ADQ, DCB is active, when user tries to change any setting in exported Tx scheduler tree. If any of those are active block the user from doing so, and log an appropriate message. Signed-off-by: Michal Wilczynski --- drivers/net/ethernet/intel/ice/ice_dcb_lib.c | 4 ++ drivers/net/ethernet/intel/ice/ice_devlink.c | 65 ++++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_type.h | 1 + 3 files changed, 70 insertions(+) diff --git a/drivers/net/ethernet/intel/ice/ice_dcb_lib.c b/drivers/net/ethernet/intel/ice/ice_dcb_lib.c index add90e75f05c..8d7fc76f49af 100644 --- a/drivers/net/ethernet/intel/ice/ice_dcb_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_dcb_lib.c @@ -364,6 +364,10 @@ int ice_pf_dcb_cfg(struct ice_pf *pf, struct ice_dcbx_cfg *new_cfg, bool locked) /* Enable DCB tagging only when more than one TC */ if (ice_dcb_get_num_tc(new_cfg) > 1) { dev_dbg(dev, "DCB tagging enabled (num TC > 1)\n"); + if (pf->hw.port_info->is_custom_tx_enabled) { + dev_err(dev, "Custom Tx scheduler feature enabled, can't configure DCB\n"); + return -EBUSY; + } set_bit(ICE_FLAG_DCB_ENA, pf->flags); } else { dev_dbg(dev, "DCB tagging disabled (num TC = 1)\n"); diff --git a/drivers/net/ethernet/intel/ice/ice_devlink.c b/drivers/net/ethernet/intel/ice/ice_devlink.c index d6e65d7b2d6f..9f584b93c786 100644 --- a/drivers/net/ethernet/intel/ice/ice_devlink.c +++ b/drivers/net/ethernet/intel/ice/ice_devlink.c @@ -8,6 +8,7 @@ #include "ice_devlink.h" #include "ice_eswitch.h" #include "ice_fw_update.h" +#include "ice_dcb_lib.h" static int ice_active_port_option = -1; @@ -713,6 +714,37 @@ ice_devlink_port_unsplit(struct devlink *devlink, struct devlink_port *port, return ice_devlink_port_split(devlink, port, 1, extack); } +/** + * ice_enable_custom_tx - try to enable custom Tx feature + * @pf: devlink struct + * + * This function tries to enabled custom Tx feature, + * it's not possible to enable it, if DCB is active. + */ +static bool ice_enable_custom_tx(struct ice_pf *pf) +{ + struct ice_port_info *pi = ice_get_main_vsi(pf)->port_info; + struct device *dev = ice_pf_to_dev(pf); + + if (pi->is_custom_tx_enabled) + /* already enabled, return true */ + return true; + + if (ice_is_adq_active(pf)) { + dev_err(dev, "ADQ active, can't modify Tx scheduler tree\n"); + return false; + } + + if (ice_is_dcb_active(pf)) { + dev_err(dev, "DCB active, can't modify Tx scheduler tree\n"); + return false; + } + + pi->is_custom_tx_enabled = true; + + return true; +} + /** * ice_traverse_tx_tree - traverse Tx scheduler tree * @devlink: devlink struct @@ -904,6 +936,9 @@ static int ice_devlink_rate_node_new(struct devlink_rate *rate_node, void **priv pi = ice_get_pi_from_dev_rate(rate_node); + if (!ice_enable_custom_tx(devlink_priv(rate_node->devlink))) + return -EBUSY; + /* preallocate memory for ice_sched_node */ node = devm_kzalloc(ice_hw_to_dev(pi->hw), sizeof(*node), GFP_KERNEL); *priv = node; @@ -924,6 +959,9 @@ static int ice_devlink_rate_node_del(struct devlink_rate *rate_node, void *priv, if (!rate_node->parent || !node || tc_node == node || !extack) return 0; + if (!ice_enable_custom_tx(devlink_priv(rate_node->devlink))) + return -EBUSY; + /* can't allow to delete a node with children */ if (node->num_children) return -EINVAL; @@ -940,6 +978,9 @@ static int ice_devlink_rate_leaf_tx_max_set(struct devlink_rate *rate_leaf, void { struct ice_sched_node *node = priv; + if (!ice_enable_custom_tx(devlink_priv(rate_leaf->devlink))) + return -EBUSY; + if (!node) return 0; @@ -953,6 +994,9 @@ static int ice_devlink_rate_leaf_tx_share_set(struct devlink_rate *rate_leaf, vo { struct ice_sched_node *node = priv; + if (!ice_enable_custom_tx(devlink_priv(rate_leaf->devlink))) + return -EBUSY; + if (!node) return 0; @@ -966,6 +1010,9 @@ static int ice_devlink_rate_leaf_tx_priority_set(struct devlink_rate *rate_leaf, { struct ice_sched_node *node = priv; + if (!ice_enable_custom_tx(devlink_priv(rate_leaf->devlink))) + return -EBUSY; + if (!node) return 0; @@ -979,6 +1026,9 @@ static int ice_devlink_rate_leaf_tx_weight_set(struct devlink_rate *rate_leaf, v { struct ice_sched_node *node = priv; + if (!ice_enable_custom_tx(devlink_priv(rate_leaf->devlink))) + return -EBUSY; + if (!node) return 0; @@ -992,6 +1042,9 @@ static int ice_devlink_rate_node_tx_max_set(struct devlink_rate *rate_node, void { struct ice_sched_node *node = priv; + if (!ice_enable_custom_tx(devlink_priv(rate_node->devlink))) + return -EBUSY; + if (!node) return 0; @@ -1005,6 +1058,9 @@ static int ice_devlink_rate_node_tx_share_set(struct devlink_rate *rate_node, vo { struct ice_sched_node *node = priv; + if (!ice_enable_custom_tx(devlink_priv(rate_node->devlink))) + return -EBUSY; + if (!node) return 0; @@ -1018,6 +1074,9 @@ static int ice_devlink_rate_node_tx_priority_set(struct devlink_rate *rate_node, { struct ice_sched_node *node = priv; + if (!ice_enable_custom_tx(devlink_priv(rate_node->devlink))) + return -EBUSY; + if (!node) return 0; @@ -1031,6 +1090,9 @@ static int ice_devlink_rate_node_tx_weight_set(struct devlink_rate *rate_node, v { struct ice_sched_node *node = priv; + if (!ice_enable_custom_tx(devlink_priv(rate_node->devlink))) + return -EBUSY; + if (!node) return 0; @@ -1057,6 +1119,9 @@ static int ice_devlink_set_parent(struct devlink_rate *devlink_rate, if (!extack) return 0; + if (!ice_enable_custom_tx(devlink_priv(devlink_rate->devlink))) + return -EBUSY; + if (!parent) { if (!node || tc_node == node || node->num_children) return -EINVAL; diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h index c93f2449d3c3..089c90f66ef6 100644 --- a/drivers/net/ethernet/intel/ice/ice_type.h +++ b/drivers/net/ethernet/intel/ice/ice_type.h @@ -715,6 +715,7 @@ struct ice_port_info { struct ice_qos_cfg qos_cfg; struct xarray sched_node_ids; u8 is_vf:1; + u8 is_custom_tx_enabled:1; }; struct ice_switch_info { -- 2.37.2