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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org, Matthias Schiffer Subject: Re: [PATCH 3/9] net: dsa: mv88e6xxx: implement get_phy_address Message-ID: <20221108091220.zpxsduscpvgr3zna@skbuf> References: <20221108082330.2086671-1-lukma@denx.de> <20221108082330.2086671-4-lukma@denx.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221108082330.2086671-4-lukma@denx.de> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Tue, Nov 08, 2022 at 09:23:24AM +0100, Lukasz Majewski wrote: > From: Matthias Schiffer > > Avoid the need to specify a PHY for each physical port in the device tree > when phy_base_addr is not 0 (6250 and 6341 families). > > This change should be backwards-compatible with existing device trees, > as it only adds sensible defaults where explicit definitions were > required before. > > Signed-off-by: Matthias Schiffer Needs your Signed-off-by tag as well. > --- Would it be possible to do like armada-3720-turris-mox.dts does, and put the phy-handle in the device tree, avoiding the need for so many PHY address translation quirks? If you're going to have U-Boot support for this switch as well, the phy-handle mechanism is the only thing that U-Boot supports, so device trees written in this way will work for both (and can be passed by U-Boot to Linux): switch1@11 { compatible = "marvell,mv88e6190"; reg = <0x11>; dsa,member = <0 1>; interrupt-parent = <&moxtet>; interrupts = ; status = "disabled"; mdio { #address-cells = <1>; #size-cells = <0>; switch1phy1: switch1phy1@1 { reg = <0x1>; }; switch1phy2: switch1phy2@2 { reg = <0x2>; }; switch1phy3: switch1phy3@3 { reg = <0x3>; }; switch1phy4: switch1phy4@4 { reg = <0x4>; }; switch1phy5: switch1phy5@5 { reg = <0x5>; }; switch1phy6: switch1phy6@6 { reg = <0x6>; }; switch1phy7: switch1phy7@7 { reg = <0x7>; }; switch1phy8: switch1phy8@8 { reg = <0x8>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <0x1>; label = "lan9"; phy-handle = <&switch1phy1>; }; port@2 { reg = <0x2>; label = "lan10"; phy-handle = <&switch1phy2>; }; port@3 { reg = <0x3>; label = "lan11"; phy-handle = <&switch1phy3>; }; port@4 { reg = <0x4>; label = "lan12"; phy-handle = <&switch1phy4>; }; port@5 { reg = <0x5>; label = "lan13"; phy-handle = <&switch1phy5>; }; port@6 { reg = <0x6>; label = "lan14"; phy-handle = <&switch1phy6>; }; port@7 { reg = <0x7>; label = "lan15"; phy-handle = <&switch1phy7>; }; port@8 { reg = <0x8>; label = "lan16"; phy-handle = <&switch1phy8>; }; switch1port9: port@9 { reg = <0x9>; label = "dsa"; phy-mode = "2500base-x"; managed = "in-band-status"; link = <&switch0port10>; }; switch1port10: port@a { reg = <0xa>; label = "dsa"; phy-mode = "2500base-x"; managed = "in-band-status"; link = <&switch2port9>; status = "disabled"; }; port-sfp@a { reg = <0xa>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; managed = "in-band-status"; status = "disabled"; }; }; };