From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDF3DC4321E for ; Wed, 30 Nov 2022 19:43:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229758AbiK3Tnn (ORCPT ); Wed, 30 Nov 2022 14:43:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229644AbiK3Tnm (ORCPT ); Wed, 30 Nov 2022 14:43:42 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48D2C93A4E for ; Wed, 30 Nov 2022 11:43:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669837421; x=1701373421; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=oSRQDFTe1BZpjSVHbsqaCDRtS+pviqrwg+pebeAt+KI=; b=a5JEsoFHpdNV8e3x5rns7vWjzyYOMMLJo+I+xAuZJG7TOc4ebeMwtSNT urYUZJUQxvWhJqwg4Gvm42/e9C+kC95/7oWdlVWPdXx1j/YAVZxPN2dvm poF+PABr1M3bGRcva/AqPlUuZ5DEhVxRqFjcOHWQ4ykmYwVsJC4gzsxQS 5sOMOgUm2bKtBrDSwNVQrgWxFwkuhAfIt2tRflHXvs7O5EkYdnJ7dl4re VWNJQgl/eZd/RnRIbqPjfhrQeAInKcfr/mvf2O5Rc2DxhchP7oKzmKRcQ vdYgjEud5C6d7itsV6qAunIjFDLx+azlCi3KbiYU9nhtv+l4SC6EWeV/E A==; X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="303098355" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="303098355" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 11:43:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="818752270" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="818752270" Received: from anguy11-desk2.jf.intel.com ([10.166.244.147]) by orsmga005.jf.intel.com with ESMTP; 30 Nov 2022 11:43:40 -0800 From: Tony Nguyen To: davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, edumazet@google.com Cc: Tony Nguyen , netdev@vger.kernel.org, jacob.e.keller@intel.com, richardcochran@gmail.com Subject: [PATCH net-next 00/14][pull request] Intel Wired LAN Driver Updates 2022-11-30 (ice) Date: Wed, 30 Nov 2022 11:43:16 -0800 Message-Id: <20221130194330.3257836-1-anthony.l.nguyen@intel.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Jacob Keller says: This series of patches primarily consists of changes to fix some corner cases that can cause Tx timestamp failures. The issues were discovered and reported by Siddaraju DH and primarily affect E822 hardware, though this series also includes some improvements that affect E810 hardware as well. The primary issue is regarding the way that E822 determines when to generate timestamp interrupts. If the driver reads timestamp indexes which do not have a valid timestamp, the E822 interrupt tracking logic can get stuck. This is due to the way that E822 hardware tracks timestamp index reads internally. I was previously unaware of this behavior as it is significantly different in E810 hardware. Most of the fixes target refactors to ensure that the ice driver does not read timestamp indexes which are not valid on E822 hardware. This is done by using the Tx timestamp ready bitmap register from the PHY. This register indicates what timestamp indexes have outstanding timestamps waiting to be captured. Care must be taken in all cases where we read the timestamp registers, and thus all flows which might have read these registers are refactored. The ice_ptp_tx_tstamp function is modified to consolidate as much of the logic relating to these registers as possible. It now handles discarding stale timestamps which are old or which occurred after a PHC time update. This replaces previously standalone thread functions like the periodic work function and the ice_ptp_flush_tx_tracker function. In addition, some minor cleanups noticed while writing these refactors are included. The remaining patches refactor the E822 implementation to remove the "bypass" mode for timestamps. The E822 hardware has the ability to provide a more precise timestamp by making use of measurements of the precise way that packets flow through the hardware pipeline. These measurements are known as "Vernier" calibration. The "bypass" mode disables many of these measurements in favor of a faster start up time for Tx and Rx timestamping. Instead, once these measurements were captured, the driver tries to reconfigure the PHY to enable the vernier calibrations. Unfortunately this recalibration does not work. Testing indicates that the PHY simply remains in bypass mode without the increased timestamp precision. Remove the attempt at recalibration and always use vernier mode. This has one disadvantage that Tx and Rx timestamps cannot begin until after at least one packet of that type goes through the hardware pipeline. Because of this, further refactor the driver to separate Tx and Rx vernier calibration. Complete the Tx and Rx independently, enabling the appropriate type of timestamp as soon as the relevant packet has traversed the hardware pipeline. This was reported by Milena Olech. Note that although these might be considered "bug fixes", the required changes in order to appropriately resolve these issues is large. Thus it does not feel suitable to send this series to net. The following are changes since commit 91a7de85600d5dfa272cea3cef83052e067dc0ab: selftests/net: add csum offload test and are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue 100GbE Jacob Keller (10): ice: fix misuse of "link err" with "link status" ice: always call ice_ptp_link_change and make it void ice: handle discarding old Tx requests in ice_ptp_tx_tstamp ice: check Tx timestamp memory register for ready timestamps ice: protect init and calibrating fields with spinlock ice: disable Tx timestamps while link is down ice: cleanup allocations in ice_ptp_alloc_tx_tracker ice: handle flushing stale Tx timestamps in ice_ptp_tx_tstamp ice: only check set bits in ice_ptp_flush_tx_tracker ice: reschedule ice_ptp_wait_for_offset_valid during reset Karol Kolacinski (1): ice: Reset TS memory for all quads Milena Olech (1): ice: Remove the E822 vernier "bypass" logic Sergey Temerkhanov (1): ice: Use more generic names for ice_ptp_tx fields Siddaraju DH (1): ice: make Tx and Rx vernier offset calibration independent drivers/net/ethernet/intel/ice/ice_main.c | 9 +- drivers/net/ethernet/intel/ice/ice_ptp.c | 564 ++++++++++---------- drivers/net/ethernet/intel/ice/ice_ptp.h | 41 +- drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 336 ++++++------ drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 8 +- 5 files changed, 490 insertions(+), 468 deletions(-) -- 2.35.1