From: Sean Anderson <sean.anderson@seco.com>
To: Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
netdev@vger.kernel.org
Cc: "David S . Miller" <davem@davemloft.net>,
Tim Harvey <tharvey@gateworks.com>,
Vladimir Oltean <olteanv@gmail.com>,
Eric Dumazet <edumazet@google.com>,
Paolo Abeni <pabeni@redhat.com>,
linux-kernel@vger.kernel.org, Jakub Kicinski <kuba@kernel.org>,
Sean Anderson <sean.anderson@seco.com>
Subject: [PATCH net-next v3 2/3] net: mdio: Update speed register bits
Date: Fri, 2 Dec 2022 13:17:17 -0500 [thread overview]
Message-ID: <20221202181719.1068869-3-sean.anderson@seco.com> (raw)
In-Reply-To: <20221202181719.1068869-1-sean.anderson@seco.com>
This updates the speed register bits to the 2018 revision of 802.3. It
also splits up the definitions to prevent confusion in casual observers.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
include/uapi/linux/mdio.h | 22 +++++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
index 75b7257a51e1..d700e9e886b9 100644
--- a/include/uapi/linux/mdio.h
+++ b/include/uapi/linux/mdio.h
@@ -127,16 +127,36 @@
#define MDIO_AN_STAT1_PAGE 0x0040 /* Page received */
#define MDIO_AN_STAT1_XNP 0x0080 /* Extended next page status */
-/* Speed register. */
+/* Generic speed register */
#define MDIO_SPEED_10G 0x0001 /* 10G capable */
+
+/* PMA/PMD Speed register. */
+#define MDIO_PMA_SPEED_10G MDIO_SPEED_10G
#define MDIO_PMA_SPEED_2B 0x0002 /* 2BASE-TL capable */
#define MDIO_PMA_SPEED_10P 0x0004 /* 10PASS-TS capable */
#define MDIO_PMA_SPEED_1000 0x0010 /* 1000M capable */
#define MDIO_PMA_SPEED_100 0x0020 /* 100M capable */
#define MDIO_PMA_SPEED_10 0x0040 /* 10M capable */
+#define MDIO_PMA_SPEED_10G1G 0x0080 /* 10/1G capable */
+#define MDIO_PMA_SPEED_40G 0x0100 /* 40G capable */
+#define MDIO_PMA_SPEED_100G 0x0200 /* 100G capable */
+#define MDIO_PMA_SPEED_10GP 0x0400 /* 10GPASS-XR capable */
+#define MDIO_PMA_SPEED_25G 0x0800 /* 25G capable */
+#define MDIO_PMA_SPEED_200G 0x1000 /* 200G capable */
+#define MDIO_PMA_SPEED_2_5G 0x2000 /* 2.5G capable */
+#define MDIO_PMA_SPEED_5G 0x4000 /* 5G capable */
+#define MDIO_PMA_SPEED_400G 0x8000 /* 400G capable */
+
+/* PCS et al. Speed register. */
+#define MDIO_PCS_SPEED_10G MDIO_SPEED_10G
#define MDIO_PCS_SPEED_10P2B 0x0002 /* 10PASS-TS/2BASE-TL capable */
+#define MDIO_PCS_SPEED_40G 0x0004 /* 450G capable */
+#define MDIO_PCS_SPEED_100G 0x0008 /* 100G capable */
+#define MDIO_PCS_SPEED_25G 0x0010 /* 25G capable */
#define MDIO_PCS_SPEED_2_5G 0x0040 /* 2.5G capable */
#define MDIO_PCS_SPEED_5G 0x0080 /* 5G capable */
+#define MDIO_PCS_SPEED_200G 0x0100 /* 200G capable */
+#define MDIO_PCS_SPEED_400G 0x0200 /* 400G capable */
/* Device present registers. */
#define MDIO_DEVS_PRESENT(devad) (1 << (devad))
--
2.35.1.1320.gc452695387.dirty
next prev parent reply other threads:[~2022-12-02 18:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-02 18:17 [PATCH net-next v3 0/3] phy: aquantia: Determine rate adaptation support from registers Sean Anderson
2022-12-02 18:17 ` [PATCH net-next v3 1/3] net: phy: Move/rename phylink_interface_max_speed Sean Anderson
2022-12-02 19:00 ` Russell King (Oracle)
2022-12-02 18:17 ` Sean Anderson [this message]
2022-12-02 19:00 ` [PATCH net-next v3 2/3] net: mdio: Update speed register bits Russell King (Oracle)
2022-12-02 19:15 ` Sean Anderson
2022-12-02 18:17 ` [PATCH net-next v3 3/3] phy: aquantia: Determine rate adaptation support from registers Sean Anderson
2022-12-03 5:26 ` Jakub Kicinski
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