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Date:   Tue, 6 Dec 2022 18:28:23 -0800
From:   Jakub Kicinski <kuba@kernel.org>
To:     Andrew Lunn <andrew@lunn.ch>
Cc:     Piergiorgio Beruto <piergiorgio.beruto@gmail.com>,
        netdev@vger.kernel.org, peppe.cavallaro@st.com,
        Voon Weifeng <weifeng.voon@intel.com>,
        Rayagond Kokatanur <rayagond@vayavyalabs.com>,
        Jose Abreu <Jose.Abreu@synopsys.com>,
        Antonio Borneo <antonio.borneo@st.com>,
        Tan Tee Min <tee.min.tan@intel.com>,
        Kurt Kanzenbach <kurt@linutronix.de>
Subject: Re: [PATCH net] stmmac: fix potential division by 0
Message-ID: <20221206182823.08e5f917@kernel.org>
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On Thu, 1 Dec 2022 15:49:37 +0100 Andrew Lunn wrote:
> > The root cause is the MAC using the internal clock as a PTP reference
> > (default), which should be allowed since the connection to an external
> > PTP clock is optional from an HW perspective. The internal clock seems
> > to be derived from the MII clock speed, which is 2.5 MHz at 10 Mb/s.  
> 
> I think we need help from somebody who understands PTP on this device.
> The clock is clearly out of range, but how important is that to PTP?
> Will PTP work if the value is clamped to 0xff? Or should we be
> returning -EINVAL and disabling PTP because it has no chance of
> working?

Indeed, we need some more info here :( Like does the PTP actually
work with 2.5 MHz clock? The frequency adjustment only cares about 
the addend, what is sub_second_inc thing?