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From: Vladimir Oltean <olteanv@gmail.com>
To: "Clément Léger" <clement.leger@bootlin.com>
Cc: "Andrew Lunn" <andrew@lunn.ch>,
	"Florian Fainelli" <f.fainelli@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Herve Codina" <herve.codina@bootlin.com>,
	"Miquèl Raynal" <miquel.raynal@bootlin.com>,
	"Milan Stevanovic" <milan.stevanovic@se.com>,
	"Jimmy Lalande" <jimmy.lalande@se.com>,
	"Pascal Eberhard" <pascal.eberhard@se.com>,
	"Arun Ramadoss" <Arun.Ramadoss@microchip.com>,
	linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v3 1/3] net: dsa: rzn1-a5psw: use a5psw_reg_rmw() to modify flooding resolution
Date: Wed, 8 Feb 2023 23:37:57 +0200	[thread overview]
Message-ID: <20230208213757.iyofbkmvww6r4luy@skbuf> (raw)
In-Reply-To: <20230208161749.331965-2-clement.leger@bootlin.com>

On Wed, Feb 08, 2023 at 05:17:47PM +0100, Clément Léger wrote:
> .port_bridge_flags will be added and allows to modify the flood mask
> independently for each port. Keeping the existing bridged_ports write
> in a5psw_flooding_set_resolution() would potentially messed up this.
> Use a read-modify-write to set that value and move bridged_ports
> handling in bridge_port_join/leave.
> 
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
> ---
>  drivers/net/dsa/rzn1_a5psw.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/dsa/rzn1_a5psw.c b/drivers/net/dsa/rzn1_a5psw.c
> index 919027cf2012..8b7d4a371f8b 100644
> --- a/drivers/net/dsa/rzn1_a5psw.c
> +++ b/drivers/net/dsa/rzn1_a5psw.c
> @@ -299,13 +299,9 @@ static void a5psw_flooding_set_resolution(struct a5psw *a5psw, int port,
>  			A5PSW_MCAST_DEF_MASK};
>  	int i;
>  
> -	if (set)
> -		a5psw->bridged_ports |= BIT(port);
> -	else
> -		a5psw->bridged_ports &= ~BIT(port);
> -
>  	for (i = 0; i < ARRAY_SIZE(offsets); i++)
> -		a5psw_reg_writel(a5psw, offsets[i], a5psw->bridged_ports);
> +		a5psw_reg_rmw(a5psw, offsets[i], BIT(port),
> +			      set ? BIT(port) : 0);
>  }
>  
>  static int a5psw_port_bridge_join(struct dsa_switch *ds, int port,
> @@ -326,6 +322,8 @@ static int a5psw_port_bridge_join(struct dsa_switch *ds, int port,
>  	a5psw_flooding_set_resolution(a5psw, port, true);
>  	a5psw_port_mgmtfwd_set(a5psw, port, false);
>  
> +	a5psw->bridged_ports |= BIT(port);
> +
>  	return 0;
>  }
>  
> @@ -334,6 +332,8 @@ static void a5psw_port_bridge_leave(struct dsa_switch *ds, int port,
>  {
>  	struct a5psw *a5psw = ds->priv;
>  
> +	a5psw->bridged_ports &= ~BIT(port);
> +
>  	a5psw_flooding_set_resolution(a5psw, port, false);
>  	a5psw_port_mgmtfwd_set(a5psw, port, true);
>  
> -- 
> 2.39.0
> 

What about the a5psw_flooding_set_resolution() call for the CPU port, from a5psw_setup()?
Isn't this an undocumented change? Does this logic in a5psw_port_bridge_leave() still work,
now that bridged_ports will no longer contain BIT(A5PSW_CPU_PORT)?

	/* No more ports bridged */
	if (a5psw->bridged_ports == BIT(A5PSW_CPU_PORT))
		a5psw->br_dev = NULL;

  parent reply	other threads:[~2023-02-08 21:38 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-08 16:17 [PATCH net-next v3 0/3] net: dsa: rzn1-a5psw: add support for vlan and .port_bridge_flags Clément Léger
2023-02-08 16:17 ` [PATCH net-next v3 1/3] net: dsa: rzn1-a5psw: use a5psw_reg_rmw() to modify flooding resolution Clément Léger
2023-02-08 17:26   ` Florian Fainelli
2023-02-08 21:37   ` Vladimir Oltean [this message]
2023-02-09  8:40     ` Clément Léger
2023-02-08 16:17 ` [PATCH net-next v3 2/3] net: dsa: rzn1-a5psw: add support for .port_bridge_flags Clément Léger
2023-02-08 17:27   ` Florian Fainelli
2023-02-08 16:17 ` [PATCH net-next v3 3/3] net: dsa: rzn1-a5psw: add vlan support Clément Léger
2023-02-08 17:38   ` Florian Fainelli
2023-02-08 22:02     ` Vladimir Oltean
2023-02-09  8:44       ` Clément Léger
2023-02-09 13:50     ` Clément Léger
2023-02-08 22:03   ` Vladimir Oltean
2023-02-09  8:47     ` Clément Léger
2023-02-09  8:15   ` Arun.Ramadoss

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