From: "Clément Léger" <clement.leger@bootlin.com>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: "Andrew Lunn" <andrew@lunn.ch>,
"Vladimir Oltean" <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
"Eric Dumazet" <edumazet@google.com>,
"Jakub Kicinski" <kuba@kernel.org>,
"Paolo Abeni" <pabeni@redhat.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Herve Codina" <herve.codina@bootlin.com>,
"Miquèl Raynal" <miquel.raynal@bootlin.com>,
"Milan Stevanovic" <milan.stevanovic@se.com>,
"Jimmy Lalande" <jimmy.lalande@se.com>,
"Pascal Eberhard" <pascal.eberhard@se.com>,
"Arun Ramadoss" <Arun.Ramadoss@microchip.com>,
linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v3 3/3] net: dsa: rzn1-a5psw: add vlan support
Date: Thu, 9 Feb 2023 14:50:06 +0100 [thread overview]
Message-ID: <20230209145006.2b42f5a3@fixe.home> (raw)
In-Reply-To: <317ec9fc-87de-2683-dfd4-30fe94e2efd7@gmail.com>
Le Wed, 8 Feb 2023 09:38:04 -0800,
Florian Fainelli <f.fainelli@gmail.com> a écrit :
> > +static void a5psw_vlan_setup(struct a5psw *a5psw, int port)
> > +{
> > + u32 reg;
> > +
> > + /* Enable TAG always mode for the port, this is actually controlled
> > + * by VLAN_IN_MODE_ENA field which will be used for PVID insertion
> > + */
> > + reg = A5PSW_VLAN_IN_MODE_TAG_ALWAYS;
> > + reg <<= A5PSW_VLAN_IN_MODE_PORT_SHIFT(port);
> > + a5psw_reg_rmw(a5psw, A5PSW_VLAN_IN_MODE, A5PSW_VLAN_IN_MODE_PORT(port),
> > + reg);
>
> If we always enable VLAN mode, which VLAN ID do switch ports not part of
> a VLAN aware bridge get classified into?
As answered on Vladimir question, it is VLAN_IN_MODE_ENAnot always VLAN enabled as
stated by the comment above but only if VLAN_IN_MODE_ENA is set (which
is done when setting a PVID only).
>
> > +
> > + /* Set transparent mode for output frame manipulation, this will depend
> > + * on the VLAN_RES configuration mode
> > + */
> > + reg = A5PSW_VLAN_OUT_MODE_TRANSPARENT;
> > + reg <<= A5PSW_VLAN_OUT_MODE_PORT_SHIFT(port);
> > + a5psw_reg_rmw(a5psw, A5PSW_VLAN_OUT_MODE,
> > + A5PSW_VLAN_OUT_MODE_PORT(port), reg);
>
> Sort of a follow-on to the previous question, what does transparent
> mean? Does that mean the frames ingressing with a certain VLAN tag will
> egress with the same VLAN tag in the absence of a VLAN configuration
> rewriting the tag?
Yes, here is an excerpt of the documentation which should clarified your
question (VLAN Table is actually stored in VLAN_RES registers):
- If frame’s VLAN id is found in the VLAN table (see Section
4.5.3.9(3)(b), VLAN Domain Resolution / VLAN Table) and the port is
defined as tagged for the VLAN, the frame is not modified.
- If frame’s VLAN id is found in the VLAN table and the port is defined
as untagged for the VLAN, the first VLAN tag is removed from the frame.
- If frame’s VLAN id is not found in the VLAN table, the frame is not
modified.
Thanks,
--
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com
next prev parent reply other threads:[~2023-02-09 13:47 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-08 16:17 [PATCH net-next v3 0/3] net: dsa: rzn1-a5psw: add support for vlan and .port_bridge_flags Clément Léger
2023-02-08 16:17 ` [PATCH net-next v3 1/3] net: dsa: rzn1-a5psw: use a5psw_reg_rmw() to modify flooding resolution Clément Léger
2023-02-08 17:26 ` Florian Fainelli
2023-02-08 21:37 ` Vladimir Oltean
2023-02-09 8:40 ` Clément Léger
2023-02-08 16:17 ` [PATCH net-next v3 2/3] net: dsa: rzn1-a5psw: add support for .port_bridge_flags Clément Léger
2023-02-08 17:27 ` Florian Fainelli
2023-02-08 16:17 ` [PATCH net-next v3 3/3] net: dsa: rzn1-a5psw: add vlan support Clément Léger
2023-02-08 17:38 ` Florian Fainelli
2023-02-08 22:02 ` Vladimir Oltean
2023-02-09 8:44 ` Clément Léger
2023-02-09 13:50 ` Clément Léger [this message]
2023-02-08 22:03 ` Vladimir Oltean
2023-02-09 8:47 ` Clément Léger
2023-02-09 8:15 ` Arun.Ramadoss
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