From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 656353FDF for ; Thu, 11 May 2023 23:29:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8179FC433EF; Thu, 11 May 2023 23:29:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1683847768; bh=SLlcwEuE4JpFNFcPjNi/S0l6z/1UC6psRw1iRRUVsYs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=efUdlcXR/weB6qRSybLmpnKrQG4ctSZoORqH6nEZTv0i+nAPO4aErh3H652p78bhZ tVE+QXHCkMDO7gRC+eRJ7rKBpsXJZQ/l/knP+UPmqN5P4YyFLbvYLE/N+2mpU8jehw JDTysC+qkto2m3UoixYkCKVqqj2MKCiOiS0dSMR1lNHOnC6XTnUF1I9jWNYP4e6LhG h9d8bKTpoQq3YuR4xqlTf/GqOXvMYILRNsWv+evIyyp7FR/57/Fu6XvxYSnFYFbXoV M6uJbiFNqPHw4+XLoGIe9pJpTllMPFIVdCOcujeyDwvddeGva5nJ+dpAi7mfwoO6kW fb+AFD5Kkdh9g== Date: Thu, 11 May 2023 16:29:26 -0700 From: Jakub Kicinski To: "Kubalewski, Arkadiusz" Cc: Vadim Fedorenko , Jiri Pirko , Jonathan Lemon , Paolo Abeni , "Olech, Milena" , "Michalik, Michal" , "linux-arm-kernel@lists.infradead.org" , poros , mschmidt , "netdev@vger.kernel.org" , "linux-clk@vger.kernel.org" , Vadim Fedorenko Subject: Re: [RFC PATCH v7 1/8] dpll: spec: Add Netlink spec in YAML Message-ID: <20230511162926.009994bb@kernel.org> In-Reply-To: References: <20230428002009.2948020-1-vadfed@meta.com> <20230428002009.2948020-2-vadfed@meta.com> <20230504142451.4828bbb5@kernel.org> <20230511082053.7d2e57e3@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Thu, 11 May 2023 20:53:40 +0000 Kubalewski, Arkadiusz wrote: > >Because I think that'd be done by an NCO, no? > > From docs I can also see that chip has additional designated dpll for NCO mode, > and this statement: > "Numerically controlled oscillator (NCO) behavior allows system software to steer > DPLL frequency or synthesizer frequency with resolution better than 0.005 ppt." > > I am certainly not an expert on this, but seems like the NCO mode for this chip > is better than FREERUN, since signal produced on output is somehow higher quality. Herm, this seems complicated. Do you have a use case for this? Maybe we can skip it :D My reading of the quote is that there is an NCO which SW can control precisely. But that does not answer the questions: - is the NCO driven by system clock or can it be used in locked mode? - what is the "system software"? FW which based on temperature information, and whatever else compensates drift of system clock? or there are exposed registers to control the NCO?