Re: [PATCH 22/26] arm64: dts: qcom: sa8775p-ride: add the SGMII PHY node

Konrad Dybcio
2023-06-12T09:36:13Z

On 12.06.2023 11:23, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>
> Add the internal SGMII/SerDes PHY node for sa8775p platforms.
>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index b130136acffe..0e59000a0c82 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -1837,6 +1837,15 @@ adreno_smmu: iommu@3da0000 {
> <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> + serdes_phy: phy@8901000 {
> + compatible = "qcom,sa8775p-dwmac-sgmii-phy";
> + reg = <0 0x08901000 0 0xe10>;
The usage of 0 is inconsistent with 0x0 everywhere else

Konrad
> + clocks = <&gcc GCC_SGMI_CLKREF_EN>;
> + clock-names = "sgmi_ref";
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> pdc: interrupt-controller@b220000 {
> compatible = "qcom,sa8775p-pdc", "qcom,pdc";
> reg = <0x0 0x0b220000 0x0 0x30000>,