From: Michael Walle <mwalle@kernel.org>
To: "Andrew Lunn" <andrew@lunn.ch>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Russell King" <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
"Eric Dumazet" <edumazet@google.com>,
"Jakub Kicinski" <kuba@kernel.org>,
"Paolo Abeni" <pabeni@redhat.com>,
"Yisen Zhuang" <yisen.zhuang@huawei.com>,
"Salil Mehta" <salil.mehta@huawei.com>,
"Florian Fainelli" <florian.fainelli@broadcom.com>,
"Broadcom internal kernel review list"
<bcm-kernel-feedback-list@broadcom.com>,
"Marek Behún" <kabel@kernel.org>, "Xu Liang" <lxu@maxlinear.com>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Simon Horman <simon.horman@corigine.com>,
Michael Walle <mwalle@kernel.org>
Subject: [PATCH net-next v3 02/11] net: phy: introduce phy_has_c45_registers()
Date: Wed, 12 Jul 2023 17:07:02 +0200 [thread overview]
Message-ID: <20230620-feature-c45-over-c22-v3-2-9eb37edf7be0@kernel.org> (raw)
In-Reply-To: <20230620-feature-c45-over-c22-v3-0-9eb37edf7be0@kernel.org>
Provide a helper to determine if the PHY has a C45 register space. This
is a preparation patch to remove the is_c45 field. No functional change.
Signed-off-by: Michael Walle <mwalle@kernel.org>
---
v3:
- rename to phy_has_c45_registers()
---
drivers/net/ethernet/hisilicon/hns/hns_ethtool.c | 4 ++--
drivers/net/phy/bcm84881.c | 2 +-
drivers/net/phy/marvell10g.c | 2 +-
drivers/net/phy/mxl-gpy.c | 2 +-
drivers/net/phy/phy-core.c | 4 ++--
drivers/net/phy/phy.c | 8 +++++---
drivers/net/phy/phy_device.c | 6 +++---
drivers/net/phy/phylink.c | 12 +++++++-----
include/linux/phy.h | 5 +++++
9 files changed, 27 insertions(+), 18 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c b/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c
index b54f3706fb97..387d24f195aa 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c
@@ -916,7 +916,7 @@ static void hns_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
hns_nic_test_strs[MAC_INTERNALLOOP_MAC]);
ethtool_sprintf(&buff,
hns_nic_test_strs[MAC_INTERNALLOOP_SERDES]);
- if ((netdev->phydev) && (!netdev->phydev->is_c45))
+ if (netdev->phydev && !phy_has_c45_registers(netdev->phydev))
ethtool_sprintf(&buff,
hns_nic_test_strs[MAC_INTERNALLOOP_PHY]);
@@ -976,7 +976,7 @@ static int hns_get_sset_count(struct net_device *netdev, int stringset)
if (priv->ae_handle->phy_if == PHY_INTERFACE_MODE_XGMII)
cnt--;
- if ((!netdev->phydev) || (netdev->phydev->is_c45))
+ if (!netdev->phydev || phy_has_c45_registers(netdev->phydev))
cnt--;
return cnt;
diff --git a/drivers/net/phy/bcm84881.c b/drivers/net/phy/bcm84881.c
index 9717a1626f3f..857344260230 100644
--- a/drivers/net/phy/bcm84881.c
+++ b/drivers/net/phy/bcm84881.c
@@ -47,7 +47,7 @@ static int bcm84881_probe(struct phy_device *phydev)
/* This driver requires PMAPMD and AN blocks */
const u32 mmd_mask = MDIO_DEVS_PMAPMD | MDIO_DEVS_AN;
- if (!phydev->is_c45 ||
+ if (!phy_has_c45_registers(phydev) ||
(phydev->c45_ids.devices_in_package & mmd_mask) != mmd_mask)
return -ENODEV;
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index 55d9d7acc32e..d1c12843462f 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -499,7 +499,7 @@ static int mv3310_probe(struct phy_device *phydev)
u32 mmd_mask = MDIO_DEVS_PMAPMD | MDIO_DEVS_AN;
int ret;
- if (!phydev->is_c45 ||
+ if (!phy_has_c45_registers(phydev) ||
(phydev->c45_ids.devices_in_package & mmd_mask) != mmd_mask)
return -ENODEV;
diff --git a/drivers/net/phy/mxl-gpy.c b/drivers/net/phy/mxl-gpy.c
index ea1073adc5a1..b4ddb9a003d9 100644
--- a/drivers/net/phy/mxl-gpy.c
+++ b/drivers/net/phy/mxl-gpy.c
@@ -281,7 +281,7 @@ static int gpy_probe(struct phy_device *phydev)
int fw_version;
int ret;
- if (!phydev->is_c45) {
+ if (!phy_has_c45_registers(phydev)) {
ret = phy_get_c45_ids(phydev);
if (ret < 0)
return ret;
diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c
index a64186dc53f8..686a57d56885 100644
--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -556,7 +556,7 @@ int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
if (phydev->drv && phydev->drv->read_mmd) {
val = phydev->drv->read_mmd(phydev, devad, regnum);
- } else if (phydev->is_c45) {
+ } else if (phy_has_c45_registers(phydev)) {
val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
devad, regnum);
} else {
@@ -612,7 +612,7 @@ int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
if (phydev->drv && phydev->drv->write_mmd) {
ret = phydev->drv->write_mmd(phydev, devad, regnum, val);
- } else if (phydev->is_c45) {
+ } else if (phy_has_c45_registers(phydev)) {
ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr,
devad, regnum, val);
} else {
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index bdf00b2b2c1d..c6059ba8b9e6 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -182,7 +182,8 @@ int phy_restart_aneg(struct phy_device *phydev)
{
int ret;
- if (phydev->is_c45 && !(phydev->c45_ids.devices_in_package & BIT(0)))
+ if (phy_has_c45_registers(phydev) &&
+ !(phydev->c45_ids.devices_in_package & BIT(0)))
ret = genphy_c45_restart_aneg(phydev);
else
ret = genphy_restart_aneg(phydev);
@@ -203,7 +204,7 @@ int phy_aneg_done(struct phy_device *phydev)
{
if (phydev->drv && phydev->drv->aneg_done)
return phydev->drv->aneg_done(phydev);
- else if (phydev->is_c45)
+ else if (phy_has_c45_registers(phydev))
return genphy_c45_aneg_done(phydev);
else
return genphy_aneg_done(phydev);
@@ -896,7 +897,8 @@ int phy_config_aneg(struct phy_device *phydev)
/* Clause 45 PHYs that don't implement Clause 22 registers are not
* allowed to call genphy_config_aneg()
*/
- if (phydev->is_c45 && !(phydev->c45_ids.devices_in_package & BIT(0)))
+ if (phy_has_c45_registers(phydev) &&
+ !(phydev->c45_ids.devices_in_package & BIT(0)))
return genphy_c45_config_aneg(phydev);
return genphy_config_aneg(phydev);
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 226d5507c865..44968ea447fc 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -533,7 +533,7 @@ static int phy_bus_match(struct device *dev, struct device_driver *drv)
if (phydrv->match_phy_device)
return phydrv->match_phy_device(phydev);
- if (phydev->is_c45) {
+ if (phy_has_c45_registers(phydev)) {
for (i = 1; i < num_ids; i++) {
if (phydev->c45_ids.device_ids[i] == 0xffffffff)
continue;
@@ -1452,7 +1452,7 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
* exist, and we should use the genphy driver.
*/
if (!d->driver) {
- if (phydev->is_c45)
+ if (phy_has_c45_registers(phydev))
d->driver = &genphy_c45_driver.mdiodrv.driver;
else
d->driver = &genphy_driver.mdiodrv.driver;
@@ -3227,7 +3227,7 @@ static int phy_probe(struct device *dev)
}
else if (phydrv->get_features)
err = phydrv->get_features(phydev);
- else if (phydev->is_c45)
+ else if (phy_has_c45_registers(phydev))
err = genphy_c45_pma_read_abilities(phydev);
else
err = genphy_read_abilities(phydev);
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index d0aaa5cad853..54fde8252079 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -1726,7 +1726,8 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
* against all interface modes, which may lead to more ethtool link
* modes being advertised than are actually supported.
*/
- if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
+ if (phy_has_c45_registers(phy) &&
+ config.rate_matching == RATE_MATCH_NONE &&
interface != PHY_INTERFACE_MODE_RXAUI &&
interface != PHY_INTERFACE_MODE_XAUI &&
interface != PHY_INTERFACE_MODE_USXGMII)
@@ -2673,7 +2674,7 @@ static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
reg);
}
- if (phydev->is_c45) {
+ if (phy_has_c45_registers(phydev)) {
switch (reg) {
case MII_BMCR:
case MII_BMSR:
@@ -2715,7 +2716,7 @@ static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
reg, val);
}
- if (phydev->is_c45) {
+ if (phy_has_c45_registers(phydev)) {
switch (reg) {
case MII_BMCR:
case MII_BMSR:
@@ -3188,8 +3189,9 @@ static void phylink_sfp_link_up(void *upstream)
*/
static bool phylink_phy_no_inband(struct phy_device *phy)
{
- return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
- 0xae025150, 0xfffffff0);
+ return phy_has_c45_registers(phy) &&
+ phy_id_compare(phy->c45_ids.device_ids[1],
+ 0xae025150, 0xfffffff0);
}
static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 11c1e91563d4..fdb3774e99fc 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -766,6 +766,11 @@ static inline struct phy_device *to_phy_device(const struct device *dev)
return container_of(to_mdio_device(dev), struct phy_device, mdio);
}
+static inline bool phy_has_c45_registers(struct phy_device *phydev)
+{
+ return phydev->is_c45;
+}
+
/**
* struct phy_tdr_config - Configuration of a TDR raw test
*
--
2.39.2
next prev parent reply other threads:[~2023-07-12 15:07 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-12 15:07 [PATCH net-next v3 00/11] net: phy: C45-over-C22 access Michael Walle
2023-07-12 15:07 ` [PATCH net-next v3 01/11] net: phy: get rid of redundant is_c45 information Michael Walle
2023-07-18 17:25 ` Andrew Lunn
2023-07-12 15:07 ` Michael Walle [this message]
2023-07-18 17:26 ` [PATCH net-next v3 02/11] net: phy: introduce phy_has_c45_registers() Andrew Lunn
2023-07-18 20:07 ` Andrew Lunn
2023-07-19 7:11 ` Michael Walle
2023-08-01 14:47 ` Michael Walle
2023-08-01 14:57 ` Russell King (Oracle)
2023-08-01 15:20 ` Michael Walle
2023-08-01 15:57 ` Russell King (Oracle)
2023-08-02 15:33 ` Michael Walle
2023-08-02 16:06 ` Russell King (Oracle)
2023-08-02 17:11 ` Michael Walle
2023-08-02 23:00 ` Russell King (Oracle)
2023-08-02 16:15 ` Andrew Lunn
2023-08-02 17:10 ` Russell King (Oracle)
2023-08-02 22:21 ` Andrew Lunn
2023-08-02 22:28 ` Russell King (Oracle)
2023-09-05 8:22 ` Michael Walle
2023-07-12 15:07 ` [PATCH net-next v3 03/11] net: phy: replace is_c45 with phy_accces_mode Michael Walle
2023-07-18 17:40 ` Andrew Lunn
2023-07-18 17:52 ` Russell King (Oracle)
2023-07-18 19:18 ` Andrew Lunn
2023-07-18 21:46 ` Russell King (Oracle)
2023-07-18 23:30 ` Andrew Lunn
2023-07-18 19:53 ` Michael Walle
2023-07-18 20:16 ` Andrew Lunn
2023-07-12 15:07 ` [PATCH net-next v3 04/11] net: phy: make the "prevent_c45_scan" a property of the MII bus Michael Walle
2023-07-18 23:31 ` Andrew Lunn
2023-07-12 15:07 ` [PATCH net-next v3 05/11] net: phy: print an info if a broken C45 bus is found Michael Walle
2023-07-18 23:32 ` Andrew Lunn
2023-07-12 15:07 ` [PATCH net-next v3 06/11] net: phy: add error checks in mmd_phy_indirect() Michael Walle
2023-07-18 23:34 ` Andrew Lunn
2023-07-12 15:07 ` [PATCH net-next v3 07/11] net: phy: introduce phy_mdiobus_read_mmd() Michael Walle
2023-07-18 23:54 ` Andrew Lunn
2023-07-19 7:21 ` Michael Walle
2023-07-12 15:07 ` [PATCH net-next v3 08/11] net: phy: add support for C45-over-C22 transfers Michael Walle
2023-07-13 8:56 ` Simon Horman
2023-07-13 9:00 ` Michael Walle
2023-07-13 9:19 ` Simon Horman
2023-07-12 15:07 ` [PATCH net-next v3 09/11] net: phy: introduce phy_promote_to_c45() Michael Walle
2023-07-13 8:56 ` Simon Horman
2023-07-12 15:07 ` [PATCH net-next v3 10/11] net: mdio: add C45-over-C22 fallback to fwnode_mdiobus_register_phy() Michael Walle
2023-07-19 0:03 ` Andrew Lunn
2023-07-19 7:32 ` Michael Walle
2023-07-12 15:07 ` [PATCH net-next v3 11/11] net: mdio: support C45-over-C22 when probed via OF Michael Walle
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