Re: [PATCH v2 03/10] net: stmmac: dwmac1000: Add multi-channel support

[kernel test robot <lkp@intel.com>]

Hi Feiyang,

kernel test robot noticed the following build warnings:

[auto build test WARNING on net/main]
[also build test WARNING on linus/master v6.5-rc3]
[cannot apply to sunxi/sunxi/for-next net-next/main horms-ipvs/master next-20230727]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Feiyang-Chen/net-stmmac-Pass-stmmac_priv-and-chan-in-some-callbacks/20230727-155954
base:   net/main
patch link:    https://lore.kernel.org/r/373259d4ac9ac0b9e1e64ad96d60a9bbd35b85aa.1690439335.git.chenfeiyang%40loongson.cn
patch subject: [PATCH v2 03/10] net: stmmac: dwmac1000: Add multi-channel support
config: alpha-randconfig-r012-20230727 (https://download.01.org/0day-ci/archive/20230727/202307271817.7iWaIMw7-lkp@intel.com/config)
compiler: alpha-linux-gcc (GCC) 12.3.0
reproduce: (https://download.01.org/0day-ci/archive/20230727/202307271817.7iWaIMw7-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202307271817.7iWaIMw7-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c:114:6: warning: no previous prototype for 'dwmac1000_dma_init_channel' [-Wmissing-prototypes]
     114 | void dwmac1000_dma_init_channel(struct stmmac_priv *priv, void __iomem *ioaddr,
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~


vim +/dwmac1000_dma_init_channel +114 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c

   113	
 > 114	void dwmac1000_dma_init_channel(struct stmmac_priv *priv, void __iomem *ioaddr,
   115					struct stmmac_dma_cfg *dma_cfg,
   116					u32 chan)
   117	{
   118		u32 value;
   119		int txpbl = dma_cfg->txpbl ?: dma_cfg->pbl;
   120		int rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl;
   121	
   122		if (!priv->plat->dwmac_is_loongson)
   123			return;
   124	
   125		/* common channel control register config */
   126		value = readl(ioaddr + DMA_BUS_MODE + chan * DMA_CHAN_OFFSET);
   127	
   128		/*
   129		 * Set the DMA PBL (Programmable Burst Length) mode.
   130		 *
   131		 * Note: before stmmac core 3.50 this mode bit was 4xPBL, and
   132		 * post 3.5 mode bit acts as 8*PBL.
   133		 */
   134		if (dma_cfg->pblx8)
   135			value |= DMA_BUS_MODE_MAXPBL;
   136		value |= DMA_BUS_MODE_USP;
   137		value &= ~(DMA_BUS_MODE_PBL_MASK | DMA_BUS_MODE_RPBL_MASK);
   138		value |= (txpbl << DMA_BUS_MODE_PBL_SHIFT);
   139		value |= (rxpbl << DMA_BUS_MODE_RPBL_SHIFT);
   140	
   141		/* Set the Fixed burst mode */
   142		if (dma_cfg->fixed_burst)
   143			value |= DMA_BUS_MODE_FB;
   144	
   145		/* Mixed Burst has no effect when fb is set */
   146		if (dma_cfg->mixed_burst)
   147			value |= DMA_BUS_MODE_MB;
   148	
   149		value |= DMA_BUS_MODE_ATDS;
   150	
   151		if (dma_cfg->aal)
   152			value |= DMA_BUS_MODE_AAL;
   153	
   154		writel(value, ioaddr + DMA_BUS_MODE + chan * DMA_CHAN_OFFSET);
   155	
   156		/* Mask interrupts by writing to CSR7 */
   157		writel(DMA_INTR_DEFAULT_MASK,
   158		       ioaddr + DMA_INTR_ENA + chan * DMA_CHAN_OFFSET);
   159	}
   160	

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