From: Paul Greenwalt <paul.greenwalt@intel.com>
To: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org,
Pawel Chmielewski <pawel.chmielewski@intel.com>,
Jesse Brandeburg <jesse.brandeburg@intel.com>,
Paul Greenwalt <paul.greenwalt@intel.com>
Subject: [PATCH iwl-next 6/7] ice: Remove redundant zeroing of the fields.
Date: Wed, 16 Aug 2023 16:57:18 -0700 [thread overview]
Message-ID: <20230816235719.1120726-7-paul.greenwalt@intel.com> (raw)
In-Reply-To: <20230816235719.1120726-1-paul.greenwalt@intel.com>
From: Pawel Chmielewski <pawel.chmielewski@intel.com>
Remove zeroing of the fields, as all the fields are in fact initialized
with zeros automatically
Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Pawel Chmielewski <pawel.chmielewski@intel.com>
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
---
drivers/net/ethernet/intel/ice/ice_main.c | 52 +++++++++++------------
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c
index ffed5543a5aa..d6715a89ec78 100644
--- a/drivers/net/ethernet/intel/ice/ice_main.c
+++ b/drivers/net/ethernet/intel/ice/ice_main.c
@@ -5605,32 +5605,32 @@ static void ice_pci_err_reset_done(struct pci_dev *pdev)
* Class, Class Mask, private data (not used) }
*/
static const struct pci_device_id ice_pci_tbl[] = {
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_BACKPLANE), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_QSFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_SFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810_XXV_BACKPLANE), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810_XXV_QSFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810_XXV_SFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_BACKPLANE), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_QSFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_SFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_10G_BASE_T), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_SGMII), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_BACKPLANE), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_QSFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_SFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_10G_BASE_T), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_SGMII), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_BACKPLANE), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_SFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_10G_BASE_T), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_SGMII), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_BACKPLANE), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_SFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_10G_BASE_T), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_1GBE), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_QSFP), 0 },
- { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822_SI_DFLT), 0 },
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_BACKPLANE)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_QSFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_SFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810_XXV_BACKPLANE)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810_XXV_QSFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810_XXV_SFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_BACKPLANE)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_QSFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_SFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_10G_BASE_T)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_SGMII)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_BACKPLANE)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_QSFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_SFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_10G_BASE_T)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_SGMII)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_BACKPLANE)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_SFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_10G_BASE_T)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_SGMII)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_BACKPLANE)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_SFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_10G_BASE_T)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_1GBE)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_QSFP)},
+ { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822_SI_DFLT)},
/* required last entry */
{ 0, }
};
--
2.39.2
next prev parent reply other threads:[~2023-08-17 0:05 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-16 23:57 [PATCH iwl-next 0/7] ice: Add basic E830 support Paul Greenwalt
2023-08-16 23:57 ` [PATCH iwl-next 1/7] ice: Add E830 device IDs, MAC type and registers Paul Greenwalt
2023-08-16 23:57 ` [PATCH iwl-next 2/7] ice: Refactor finding advertised link speed Paul Greenwalt
2023-08-17 1:00 ` Andrew Lunn
2023-08-18 16:29 ` Greenwalt, Paul
2023-08-19 5:11 ` [Intel-wired-lan] " Paul Menzel
2023-08-16 23:57 ` [PATCH iwl-next 3/7] ice: Add 200G speed/phy type use Paul Greenwalt
2023-08-16 23:57 ` [PATCH iwl-next 4/7] ice: Add ice_get_link_status_datalen Paul Greenwalt
2023-08-16 23:57 ` [PATCH iwl-next 5/7] ice: Add support for E830 DDP package segment Paul Greenwalt
2023-08-16 23:57 ` Paul Greenwalt [this message]
2023-08-16 23:57 ` [PATCH iwl-next 7/7] ice: Enable support for E830 device IDs Paul Greenwalt
2023-08-19 5:03 ` [Intel-wired-lan] " Paul Menzel
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