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From: Simon Horman <horms@kernel.org>
To: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@oss.nxp.com>
Cc: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk,
	davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	pabeni@redhat.com, richardcochran@gmail.com, sd@queasysnail.net,
	sebastian.tobuschat@nxp.com, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [RFC net-next v3 4/6] net: phy: nxp-c45-tja11xx: add MACsec support
Date: Thu, 7 Sep 2023 17:00:58 +0200	[thread overview]
Message-ID: <20230907150058.GD434333@kernel.org> (raw)
In-Reply-To: <20230906160134.311993-5-radu-nicolae.pirea@oss.nxp.com>

On Wed, Sep 06, 2023 at 07:01:32PM +0300, Radu Pirea (NXP OSS) wrote:
> Add MACsec support.
> The MACsec block has four TX SCs and four RX SCs. The driver supports up
> to four SecY. Each SecY with one TX SC and one RX SC.
> The RX SCs can have two keys, key A and key B, written in hardware and
> enabled at the same time.
> The TX SCs can have two keys written in hardware, but only one can be
> active at a given time.
> On TX, the SC is selected using the MAC source address. Due of this
> selection mechanism, each offloaded netdev must have a unique MAC
> address.
> On RX, the SC is selected by SCI(found in SecTAG or calculated using MAC
> SA), or using RX SC 0 as implicit.
> 
> Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com>

...

> +static struct nxp_c45_sa *nxp_c45_find_sa(struct list_head *sa_list,
> +					  enum nxp_c45_sa_type sa_type, u8 an)
> +{
> +	struct nxp_c45_sa *pos, *tmp;
> +
> +	list_for_each_entry_safe(pos, tmp, sa_list, list)
> +		if (pos->an == an && pos->type == sa_type)
> +			return pos;
> +
> +	return ERR_PTR(-EINVAL);
> +}

...

> +void nxp_c45_handle_macsec_interrupt(struct phy_device *phydev,
> +				     irqreturn_t *ret)
> +{
> +	struct nxp_c45_phy *priv = phydev->priv;
> +	struct nxp_c45_secy *pos, *tmp;
> +	struct nxp_c45_sa *sa;
> +	u8 encoding_sa;
> +	int secy_id;
> +	u32 reg = 0;
> +
> +	if (!phydev->macsec_ops)
> +		return;
> +
> +	do {
> +		nxp_c45_macsec_read(phydev, MACSEC_EVR, &reg);
> +		if (!reg)
> +			return;
> +
> +		secy_id = MACSEC_REG_SIZE - ffs(reg);
> +		list_for_each_entry_safe(pos, tmp, &priv->macsec->secy_list,
> +					 list)
> +			if (pos->secy_id == secy_id)
> +				break;
> +
> +		encoding_sa = pos->secy->tx_sc.encoding_sa;
> +		phydev_dbg(phydev, "pn_wrapped: TX SC %d, encoding_sa %u\n",
> +			   pos->secy_id, encoding_sa);
> +
> +		sa = nxp_c45_find_sa(&pos->sa_list, TX_SA, encoding_sa);
> +		if (!IS_ERR(sa))
> +			macsec_pn_wrapped(pos->secy, sa->sa);
> +		else
> +			WARN_ON(!sa);

Hi Radu,

Smatch doesn't seem to think that sa can be NULL: it is either a valid
pointer or an error pointer.

> +
> +		nxp_c45_macsec_write(phydev, MACSEC_EVR,
> +				     TX_SC_BIT(pos->secy_id));
> +		*ret = IRQ_HANDLED;
> +	} while (reg);
> +}

...

  reply	other threads:[~2023-09-07 15:01 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-06 16:01 [RFC net-next v3 0/6] Add MACsec support for TJA11XX C45 PHYs Radu Pirea (NXP OSS)
2023-09-06 16:01 ` [RFC net-next v3 1/6] net: macsec: move sci_to_cpu to macsec header Radu Pirea (NXP OSS)
2023-09-06 16:01 ` [RFC net-next v3 2/6] net: macsec: documentation for macsec_context and macsec_ops Radu Pirea (NXP OSS)
2023-09-06 16:01 ` [RFC net-next v3 3/6] net: macsec: introduce mdo_insert_tx_tag Radu Pirea (NXP OSS)
2023-09-06 16:01 ` [RFC net-next v3 4/6] net: phy: nxp-c45-tja11xx: add MACsec support Radu Pirea (NXP OSS)
2023-09-07 15:00   ` Simon Horman [this message]
2023-09-08  6:55     ` Radu Pirea (OSS)
2023-09-11 12:00   ` Sabrina Dubroca
2023-09-11 15:57     ` Radu Pirea (OSS)
2023-09-06 16:01 ` [RFC net-next v3 5/6] net: phy: nxp-c45-tja11xx: add MACsec statistics Radu Pirea (NXP OSS)
2023-09-11 12:00   ` Sabrina Dubroca
2023-09-11 15:04     ` Radu Pirea (OSS)
2023-09-06 16:01 ` [RFC net-next v3 6/6] net: phy: nxp-c45-tja11xx: implement mdo_insert_tx_tag Radu Pirea (NXP OSS)
2023-09-07 15:04   ` Simon Horman
2023-09-08  6:09     ` Radu Pirea (OSS)

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