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From: Vladimir Oltean <olteanv@gmail.com>
To: "Russell King (Oracle)" <linux@armlinux.org.uk>
Cc: "Arınç ÜNAL" <arinc.unal@arinc9.com>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Florian Fainelli" <f.fainelli@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Woojung Huh" <woojung.huh@microchip.com>,
	UNGLinuxDriver@microchip.com,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Alvin Šipraga" <alsi@bang-olufsen.dk>,
	"Daniel Golle" <daniel@makrotopia.org>,
	"Landen Chao" <Landen.Chao@mediatek.com>,
	"DENG Qingfang" <dqfext@gmail.com>,
	"Sean Wang" <sean.wang@mediatek.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	mithat.guner@xeront.com, erkin.bozoglu@xeront.com,
	netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org
Subject: Re: [PATCH 2/4] dt-bindings: net: dsa: document internal MDIO bus
Date: Thu, 14 Sep 2023 19:12:26 +0300	[thread overview]
Message-ID: <20230914161226.563423jjeuywfe57@skbuf> (raw)
In-Reply-To: <ZQHcV5DUfcCYkkTi@shell.armlinux.org.uk>

On Wed, Sep 13, 2023 at 04:59:19PM +0100, Russell King (Oracle) wrote:
> However, phylink pretty much requires phy-mode to be specified to be
> something sane for shared ports, so I wouldn't be in favour of relaxing
> the checkinng in dsa_shared_port_validate_of()... not unless you're
> now going to accept the approach I originally proposed to have DSA
> drivers tell the core (and thus phylink) what phy-mode and other link
> parameters should be used when they are missing from DT.

Ok, so with a missing phy-mode on the CPU port, phylink_parse_fixedlink() ->
phy_lookup_setting() will return NULL and that will print a phylink_warn(),
but other than that, phylink_mac_link_up() does get called at the right
speed and duplex.

I agree that for sane behavior it should be specified, but it appears
that even with PHY_INTERFACE_MODE_NA something can be hacked up...

[    4.818368] sja1105 spi0.1: Failed to read phy-mode or phy-interface-type property for port 4
[    4.864667] sja1105 spi0.1: OF node /soc/spi@2100000/ethernet-switch@1/ports/port@4 of CPU port 4 lacks the required "phy-mode" property
[    4.882957] sja1105 spi0.1: pl->link_config.speed 1000 pl->link_config.duplex 1 pl->supported 00,00000000,00000000,00000240
[    4.894189] sja1105 spi0.1: phy_setting speed -1 duplex -1 bit -1
[    4.900283] sja1105 spi0.1: fixed link full duplex 1000Mbps not recognised
[    4.907798] sja1105 spi0.1: configuring for fixed/ link mode
[    4.916183] sja1105 spi0.1 swp5 (uninitialized): PHY [mdio@2d24000:06] driver [Broadcom BCM5464] (irq=POLL)
[    4.934770] sja1105 spi0.1 swp2 (uninitialized): PHY [mdio@2d24000:03] driver [Broadcom BCM5464] (irq=POLL)
[    4.951619] sja1105 spi0.1 swp3 (uninitialized): PHY [mdio@2d24000:04] driver [Broadcom BCM5464] (irq=POLL)
[    4.968349] sja1105 spi0.1 swp4 (uninitialized): PHY [mdio@2d24000:05] driver [Broadcom BCM5464] (irq=POLL)
[    4.984017] fsl-gianfar soc:ethernet@2d90000 eth2: entered promiscuous mode
[    4.991327] DSA: tree 0 setup
[    4.995129] sja1105 spi0.1: sja1105_mac_link_up: port 4 interface  speed 1000 duplex 1
[    5.005004] sja1105 spi0.1: Link is Up - 1Gbps/Full - flow control off

diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts b/arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts
index 1ea32fff4120..0bfffcb51af9 100644
--- a/arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts
+++ b/arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts
@@ -90,7 +90,7 @@ port@3 {
 			port@4 {
 				/* Internal port connected to eth2 */
 				ethernet = <&enet2>;
-				phy-mode = "rgmii";
+//				phy-mode = "rgmii";
 				rx-internal-delay-ps = <0>;
 				tx-internal-delay-ps = <0>;
 				reg = <4>;
diff --git a/drivers/net/dsa/sja1105/sja1105_main.c b/drivers/net/dsa/sja1105/sja1105_main.c
index a23d980d28f5..dba1fa545a9c 100644
--- a/drivers/net/dsa/sja1105/sja1105_main.c
+++ b/drivers/net/dsa/sja1105/sja1105_main.c
@@ -327,6 +327,8 @@ static int sja1105_init_mii_settings(struct sja1105_private *priv)
 			mii->xmii_mode[i] = XMII_MODE_SGMII;
 			mii->special[i] = true;
 			break;
+		case PHY_INTERFACE_MODE_NA:
+			break;
 unsupported:
 		default:
 			dev_err(dev, "Unsupported PHY mode %s on port %d!\n",
@@ -1205,11 +1207,10 @@ static int sja1105_parse_ports_node(struct sja1105_private *priv,
 		/* Get PHY mode from DT */
 		err = of_get_phy_mode(child, &phy_mode);
 		if (err) {
-			dev_err(dev, "Failed to read phy-mode or "
+			dev_warn(dev, "Failed to read phy-mode or "
 				"phy-interface-type property for port %d\n",
 				index);
-			of_node_put(child);
-			return -ENODEV;
+			phy_mode = PHY_INTERFACE_MODE_NA;
 		}
 
 		phy_node = of_parse_phandle(child, "phy-handle", 0);
@@ -1383,6 +1384,8 @@ static void sja1105_mac_link_up(struct dsa_switch *ds, int port,
 {
 	struct sja1105_private *priv = ds->priv;
 
+	dev_err(ds->dev, "%s: port %d interface %s speed %d duplex %d\n", __func__, port, phy_modes(interface), speed, duplex);
+
 	sja1105_adjust_port_config(priv, port, speed);
 
 	sja1105_inhibit_tx(priv, BIT(port), false);
@@ -1414,7 +1417,10 @@ static void sja1105_phylink_get_caps(struct dsa_switch *ds, int port,
 		 * config (the xMII Mode table cannot be dynamically
 		 * reconfigured), and we have to program that early.
 		 */
-		__set_bit(phy_mode, config->supported_interfaces);
+		if (phy_mode == PHY_INTERFACE_MODE_NA)
+			phy_interface_set_rgmii(config->supported_interfaces);
+		else
+			__set_bit(phy_mode, config->supported_interfaces);
 	}
 
 	/* The MAC does not support pause frames, and also doesn't
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 0d7354955d62..674689011059 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -841,6 +841,15 @@ static int phylink_parse_fixedlink(struct phylink *pl,
 	if (autoneg)
 		phylink_set(pl->supported, Autoneg);
 
+	phylink_err(pl, "pl->link_config.speed %d pl->link_config.duplex %d pl->supported %*pb\n",
+		    pl->link_config.speed, pl->link_config.duplex, __ETHTOOL_LINK_MODE_MASK_NBITS,
+		    pl->supported);
+
+	phylink_err(pl, "phy_setting speed %d duplex %d bit %d\n",
+		    s ? s->speed : -1,
+		    s ? s->duplex : -1,
+		    s ? s->bit : -1);
+
 	if (s) {
 		__set_bit(s->bit, pl->supported);
 		__set_bit(s->bit, pl->link_config.lp_advertising);
diff --git a/net/dsa/port.c b/net/dsa/port.c
index 5f01bd4f9dec..34e5dc48f0ff 100644
--- a/net/dsa/port.c
+++ b/net/dsa/port.c
@@ -1927,6 +1927,16 @@ static const char * const dsa_switches_apply_workarounds[] = {
 #if IS_ENABLED(CONFIG_NET_DSA_SMSC_LAN9303_I2C)
 	"smsc,lan9303-i2c",
 #endif
+	"nxp,sja1105e",
+	"nxp,sja1105t",
+	"nxp,sja1105p",
+	"nxp,sja1105q",
+	"nxp,sja1105r",
+	"nxp,sja1105s",
+	"nxp,sja1110a",
+	"nxp,sja1110b",
+	"nxp,sja1110c",
+	"nxp,sja1110d",
 	NULL,
 };
 

  reply	other threads:[~2023-09-14 16:12 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-12  9:17 [PATCH net-next 0/4] Document internal MDIO bus of DSA switch and support it on MT7530 Arınç ÜNAL
2023-08-12  9:17 ` [PATCH 1/4] dt-bindings: net: dsa: microchip,lan937x: add missing ethernet on example Arınç ÜNAL
2023-08-13 11:07   ` Vladimir Oltean
2023-08-13 11:23     ` Arınç ÜNAL
2023-08-14 14:54   ` Vladimir Oltean
2023-08-16 16:29   ` Florian Fainelli
2023-08-21 17:36   ` Rob Herring
2023-08-12  9:17 ` [PATCH 2/4] dt-bindings: net: dsa: document internal MDIO bus Arınç ÜNAL
2023-08-12 16:28   ` Arınç ÜNAL
2023-08-12 19:20     ` Arınç ÜNAL
2023-08-13 11:53       ` Vladimir Oltean
2023-08-13 12:59         ` Arınç ÜNAL
2023-08-13 14:58           ` Arınç ÜNAL
2023-08-13 19:02             ` Vladimir Oltean
2023-08-14 10:06               ` Arınç ÜNAL
2023-08-14 10:39                 ` Vladimir Oltean
2023-08-13 19:01           ` Vladimir Oltean
2023-08-14 10:06             ` Arınç ÜNAL
2023-08-14 13:09               ` Andrew Lunn
2023-08-27  8:38                 ` Arınç ÜNAL
2023-09-09  6:23                 ` Arınç ÜNAL
2023-09-13  1:21                   ` Andrew Lunn
2023-09-13 12:44                     ` Arınç ÜNAL
2023-08-14 14:36               ` Vladimir Oltean
2023-08-27  8:33                 ` Arınç ÜNAL
2023-08-27 12:12                   ` Vladimir Oltean
2023-09-04 11:33                     ` Arınç ÜNAL
2023-09-05  2:42                       ` Luiz Angelo Daros de Luca
2023-09-05 11:00                         ` Arınç ÜNAL
2023-09-05 11:05                         ` Vladimir Oltean
2023-09-05 11:11                         ` Vladimir Oltean
2023-09-05 12:13                           ` Andrew Lunn
2023-09-09  8:53                       ` Arınç ÜNAL
2023-09-09 14:35                         ` Arınç ÜNAL
2023-09-09 19:53                         ` Arınç ÜNAL
2023-09-09 21:16                         ` Andrew Lunn
2023-09-12 18:09                           ` Arınç ÜNAL
2023-09-11 22:51                         ` Vladimir Oltean
2023-09-12 19:23                           ` Arınç ÜNAL
2023-09-12 19:34                             ` Vladimir Oltean
2023-09-13  5:52                               ` Arınç ÜNAL
2023-09-13  7:42                                 ` Vladimir Oltean
2023-09-13 10:59                                   ` Arınç ÜNAL
2023-09-13 11:04                                     ` Vladimir Oltean
2023-09-13 11:35                                       ` Arınç ÜNAL
2023-09-13 13:00                                         ` Vladimir Oltean
2023-09-13 14:36                                           ` Arınç ÜNAL
2023-09-13 15:59                                   ` Russell King (Oracle)
2023-09-14 16:12                                     ` Vladimir Oltean [this message]
2023-09-14 18:06                                     ` Russell King (Oracle)
2023-09-14 18:07                                       ` Russell King (Oracle)
2023-09-15 12:18                                         ` Vladimir Oltean
2023-08-14 14:57           ` Vladimir Oltean
2023-08-21 17:44       ` Rob Herring
2023-08-27  8:42         ` Arınç ÜNAL
2023-08-13 11:15   ` Vladimir Oltean
2023-08-13 12:58     ` Arınç ÜNAL
2023-08-12  9:17 ` [PATCH 3/4] dt-bindings: net: dsa: realtek: require compatible property under mdio node Arınç ÜNAL
2023-08-12 16:31   ` Arınç ÜNAL
2023-08-14 14:53   ` Vladimir Oltean
2023-08-14 18:23   ` Linus Walleij
2023-08-16 16:28   ` Florian Fainelli
2023-08-12  9:17 ` [PATCH 4/4] net: dsa: mt7530: register OF node for internal MDIO bus Arınç ÜNAL

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