* [PATCH net] amd-xgbe: read STAT1 register twice to get correct value
@ 2023-09-14 4:19 Raju Rangoju
2023-09-15 12:41 ` Andrew Lunn
2023-10-12 17:29 ` Raju Rangoju
0 siblings, 2 replies; 8+ messages in thread
From: Raju Rangoju @ 2023-09-14 4:19 UTC (permalink / raw)
To: netdev; +Cc: davem, edumazet, kuba, pabeni, Shyam-sundar.S-k, Raju Rangoju
Link status is latched low, so read once to clear
and then read again to get current state.
Fixes: 4f3b20bfbb75 ("amd-xgbe: add support for rx-adaptation")
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Acked-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
---
drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
index 6a716337f48b..c83085285e8c 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
@@ -2930,6 +2930,7 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
/* check again for the link and adaptation status */
reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
+ reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
if ((reg & MDIO_STAT1_LSTATUS) && pdata->rx_adapt_done)
return 1;
} else if (reg & MDIO_STAT1_LSTATUS)
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH net] amd-xgbe: read STAT1 register twice to get correct value
2023-09-14 4:19 [PATCH net] amd-xgbe: read STAT1 register twice to get correct value Raju Rangoju
@ 2023-09-15 12:41 ` Andrew Lunn
2023-09-15 19:18 ` Tom Lendacky
2023-10-12 17:29 ` Raju Rangoju
1 sibling, 1 reply; 8+ messages in thread
From: Andrew Lunn @ 2023-09-15 12:41 UTC (permalink / raw)
To: Raju Rangoju; +Cc: netdev, davem, edumazet, kuba, pabeni, Shyam-sundar.S-k
On Thu, Sep 14, 2023 at 09:49:44AM +0530, Raju Rangoju wrote:
> Link status is latched low, so read once to clear
> and then read again to get current state.
I don't know about your PHY implementation, but within phylib and
Linux PHY drivers, this is considered wrong. You loose out on being
notified of the link going down and then back up again. Or up and then
down again.
But since this is not a Linux PHY driver, you are free to do whatever
you want...
Also, i believe it is latched, not latched low. So i think your commit
message is wrong. You should probably check with IEEE 802.3 clause 22.
Andrew
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH net] amd-xgbe: read STAT1 register twice to get correct value
2023-09-15 12:41 ` Andrew Lunn
@ 2023-09-15 19:18 ` Tom Lendacky
2023-09-17 8:31 ` Raju Rangoju
0 siblings, 1 reply; 8+ messages in thread
From: Tom Lendacky @ 2023-09-15 19:18 UTC (permalink / raw)
To: Andrew Lunn, Raju Rangoju
Cc: netdev, davem, edumazet, kuba, pabeni, Shyam-sundar.S-k
On 9/15/23 07:41, Andrew Lunn wrote:
> On Thu, Sep 14, 2023 at 09:49:44AM +0530, Raju Rangoju wrote:
>> Link status is latched low, so read once to clear
>> and then read again to get current state.
>
> I don't know about your PHY implementation, but within phylib and
> Linux PHY drivers, this is considered wrong. You loose out on being
> notified of the link going down and then back up again. Or up and then
> down again.
>
> But since this is not a Linux PHY driver, you are free to do whatever
> you want...
>
> Also, i believe it is latched, not latched low. So i think your commit
> message is wrong. You should probably check with IEEE 802.3 clause 22.
Granted I have an old version of IEEE 802.3, but "Table 22-8 - Status
register bit definitions" has:
1.2 Link Status 1 = link is up 0 = link is down RO/LL
So latched low.
Thanks,
Tom
>
> Andrew
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH net] amd-xgbe: read STAT1 register twice to get correct value
2023-09-15 19:18 ` Tom Lendacky
@ 2023-09-17 8:31 ` Raju Rangoju
2023-09-17 14:11 ` Andrew Lunn
0 siblings, 1 reply; 8+ messages in thread
From: Raju Rangoju @ 2023-09-17 8:31 UTC (permalink / raw)
To: Tom Lendacky, Andrew Lunn
Cc: netdev, davem, edumazet, kuba, pabeni, Shyam-sundar.S-k
On 9/16/2023 12:48 AM, Tom Lendacky wrote:
>
>
> On 9/15/23 07:41, Andrew Lunn wrote:
>> On Thu, Sep 14, 2023 at 09:49:44AM +0530, Raju Rangoju wrote:
>>> Link status is latched low, so read once to clear
>>> and then read again to get current state.
>>
>> I don't know about your PHY implementation, but within phylib and
>> Linux PHY drivers, this is considered wrong. You loose out on being
>> notified of the link going down and then back up again. Or up and then
>> down again.
>>
>> But since this is not a Linux PHY driver, you are free to do whatever
>> you want...
>>
>> Also, i believe it is latched, not latched low. So i think your commit
>> message is wrong. You should probably check with IEEE 802.3 clause 22.
>
> Granted I have an old version of IEEE 802.3, but "Table 22-8 - Status
> register bit definitions" has:
>
> 1.2 Link Status 1 = link is up 0 = link is down RO/LL
>
> So latched low.
Thanks, Tom.
The following thread (found online) has the detailed info on the IEEE
802.3 Standard that define the Link Status bit:
https://microchip.my.site.com/s/article/How-to-correctly-read-the-Ethernet-PHY-Link-Status-bit
Thanks,
Raju
>
> Thanks,
> Tom
>
>>
>> Andrew
>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH net] amd-xgbe: read STAT1 register twice to get correct value
2023-09-17 8:31 ` Raju Rangoju
@ 2023-09-17 14:11 ` Andrew Lunn
2023-10-05 3:35 ` Raju Rangoju
0 siblings, 1 reply; 8+ messages in thread
From: Andrew Lunn @ 2023-09-17 14:11 UTC (permalink / raw)
To: Raju Rangoju
Cc: Tom Lendacky, netdev, davem, edumazet, kuba, pabeni,
Shyam-sundar.S-k
> Thanks, Tom.
>
> The following thread (found online) has the detailed info on the IEEE 802.3
> Standard that define the Link Status bit:
>
> https://microchip.my.site.com/s/article/How-to-correctly-read-the-Ethernet-PHY-Link-Status-bit
The relevant section for me is:
Having a latched-low bit helps to ensure a link drop (no matter
how short the duration before re-establishing link-up again) gets
recorded and can be read from PHY register by the upper network
layer (e.g., MAC processor).
By reading it twice, you are loosing the information the link went
down. This could mean you don't restart dhcp to get a new IP address
for a new subnet, kick of IPv6 getting the new network prefix so it
can create its IPv6 address etc.
When Linux is driving the PHYs using phylib, drivers are written such
that they report the latched link down. This gets report to the stack,
and so up to user space etc. phylib will then ask the driver a second
time to get the link status, and it might then return that the link is
now up. That then gets reported to the stack and user space.
As i said, you are not using phylib, this is not a linux PHY driver,
so i don't actually care what you do here. I just want to point out
why what you are doing could be wrong.
Andrew
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH net] amd-xgbe: read STAT1 register twice to get correct value
2023-09-17 14:11 ` Andrew Lunn
@ 2023-10-05 3:35 ` Raju Rangoju
0 siblings, 0 replies; 8+ messages in thread
From: Raju Rangoju @ 2023-10-05 3:35 UTC (permalink / raw)
To: kuba, Andrew Lunn
Cc: Tom Lendacky, netdev, davem, edumazet, pabeni, Shyam-sundar.S-k
Hi Andrew,
Thanks for the explanation. The current approach is holding good for
amd-xgbe.
Hi Jakub,
Can you please apply this patch.
Thanks,
Raju
On 9/17/2023 7:41 PM, Andrew Lunn wrote:
>> Thanks, Tom.
>>
>> The following thread (found online) has the detailed info on the IEEE 802.3
>> Standard that define the Link Status bit:
>>
>> https://microchip.my.site.com/s/article/How-to-correctly-read-the-Ethernet-PHY-Link-Status-bit
>
> The relevant section for me is:
>
> Having a latched-low bit helps to ensure a link drop (no matter
> how short the duration before re-establishing link-up again) gets
> recorded and can be read from PHY register by the upper network
> layer (e.g., MAC processor).
>
> By reading it twice, you are loosing the information the link went
> down. This could mean you don't restart dhcp to get a new IP address
> for a new subnet, kick of IPv6 getting the new network prefix so it
> can create its IPv6 address etc.
>
> When Linux is driving the PHYs using phylib, drivers are written such
> that they report the latched link down. This gets report to the stack,
> and so up to user space etc. phylib will then ask the driver a second
> time to get the link status, and it might then return that the link is
> now up. That then gets reported to the stack and user space.
>
> As i said, you are not using phylib, this is not a linux PHY driver,
> so i don't actually care what you do here. I just want to point out
> why what you are doing could be wrong.
>
> Andrew
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH net] amd-xgbe: read STAT1 register twice to get correct value
2023-09-14 4:19 [PATCH net] amd-xgbe: read STAT1 register twice to get correct value Raju Rangoju
2023-09-15 12:41 ` Andrew Lunn
@ 2023-10-12 17:29 ` Raju Rangoju
2023-10-12 23:26 ` Jakub Kicinski
1 sibling, 1 reply; 8+ messages in thread
From: Raju Rangoju @ 2023-10-12 17:29 UTC (permalink / raw)
To: kuba, netdev; +Cc: davem, edumazet, pabeni, Shyam-sundar.S-k
Hi Jakub,
Can you please apply this patch? Let me know if it needs to be resent.
Thanks,
Raju
On 9/14/2023 9:49 AM, Raju Rangoju wrote:
> Link status is latched low, so read once to clear
> and then read again to get current state.
>
> Fixes: 4f3b20bfbb75 ("amd-xgbe: add support for rx-adaptation")
> Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
> Acked-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> ---
> drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
> index 6a716337f48b..c83085285e8c 100644
> --- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
> +++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
> @@ -2930,6 +2930,7 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
>
> /* check again for the link and adaptation status */
> reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
> + reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
> if ((reg & MDIO_STAT1_LSTATUS) && pdata->rx_adapt_done)
> return 1;
> } else if (reg & MDIO_STAT1_LSTATUS)
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH net] amd-xgbe: read STAT1 register twice to get correct value
2023-10-12 17:29 ` Raju Rangoju
@ 2023-10-12 23:26 ` Jakub Kicinski
0 siblings, 0 replies; 8+ messages in thread
From: Jakub Kicinski @ 2023-10-12 23:26 UTC (permalink / raw)
To: Raju Rangoju; +Cc: netdev, davem, edumazet, pabeni, Shyam-sundar.S-k
On Thu, 12 Oct 2023 22:59:57 +0530 Raju Rangoju wrote:
> Hi Jakub,
>
> Can you please apply this patch? Let me know if it needs to be resent.
Yes, please resend. And please put in the commit message an explanation
more technically detailed than "The current approach is holding good
for amd-xgbe." :(
Reminder: please don't top post on the ML.
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2023-10-12 23:26 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2023-09-14 4:19 [PATCH net] amd-xgbe: read STAT1 register twice to get correct value Raju Rangoju
2023-09-15 12:41 ` Andrew Lunn
2023-09-15 19:18 ` Tom Lendacky
2023-09-17 8:31 ` Raju Rangoju
2023-09-17 14:11 ` Andrew Lunn
2023-10-05 3:35 ` Raju Rangoju
2023-10-12 17:29 ` Raju Rangoju
2023-10-12 23:26 ` Jakub Kicinski
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