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Date: Fri, 13 Oct 2023 17:47:16 +0200
From: Simon Horman <horms@kernel.org>
To: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Woojung Huh <woojung.huh@microchip.com>, UNGLinuxDriver@microchip.com,
	Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Vladimir Oltean <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Heiner Kallweit <hkallweit1@gmail.com>, kernel@pengutronix.de,
	linux-kernel@vger.kernel.org, Russell King <linux@armlinux.org.uk>,
	netdev@vger.kernel.org
Subject: Re: [PATCH net-next v1 2/3] net: dsa: microchip: ksz8: Enable MIIM
 PHY Control reg access
Message-ID: <20231013154716.GP29570@kernel.org>
References: <20231011123856.1443308-1-o.rempel@pengutronix.de>
 <20231011123856.1443308-2-o.rempel@pengutronix.de>
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In-Reply-To: <20231011123856.1443308-2-o.rempel@pengutronix.de>

On Wed, Oct 11, 2023 at 02:38:55PM +0200, Oleksij Rempel wrote:
> Provide access to MIIM PHY Control register (Reg. 31) through
> ksz8_r_phy_ctrl() and ksz8_w_phy_ctrl() functions. Necessary for
> upcoming micrel.c patch to address forced link mode configuration.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> ---
>  drivers/net/dsa/microchip/ksz8795.c | 81 +++++++++++++++++++++++++++--
>  1 file changed, 78 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c
> index 91aba470fb2f..11cb054cb54f 100644
> --- a/drivers/net/dsa/microchip/ksz8795.c
> +++ b/drivers/net/dsa/microchip/ksz8795.c
> @@ -632,6 +632,47 @@ static void ksz8_w_vlan_table(struct ksz_device *dev, u16 vid, u16 vlan)
>  	ksz8_w_table(dev, TABLE_VLAN, addr, buf);
>  }
>  
> +/**
> + * ksz8_r_phy_ctrl - Translates and reads from the SMI interface to a MIIM PHY
> + *		     Control register (Reg. 31).
> + * @dev: The KSZ device instance.
> + * @port: The port number to be read.

nit: please include an entry for @val here

> + *
> + * This function reads the SMI interface and translates the hardware register
> + * bit values into their corresponding control settings for a MIIM PHY Control
> + * register.
> + */
> +static int ksz8_r_phy_ctrl(struct ksz_device *dev, int port, u16 *val)

...