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From: Simon Horman <horms@kernel.org>
To: Srujana Challa <schalla@marvell.com>
Cc: herbert@gondor.apana.org.au, davem@davemloft.net,
	linux-crypto@vger.kernel.org, netdev@vger.kernel.org,
	linux-doc@vger.kernel.org, bbrezillon@kernel.org,
	arno@natisbad.org, kuba@kernel.org, ndabilpuram@marvell.com,
	sgoutham@marvell.com
Subject: Re: [PATCH v1 09/10] crypto/octeontx2: register error interrupts for inline cptlf
Date: Sun, 19 Nov 2023 19:54:01 +0000	[thread overview]
Message-ID: <20231119195401.GH186930@vergenet.net> (raw)
In-Reply-To: <20231103053306.2259753-10-schalla@marvell.com>

On Fri, Nov 03, 2023 at 11:03:05AM +0530, Srujana Challa wrote:
> From: Nithin Dabilpuram <ndabilpuram@marvell.com>
> 
> Register errors interrupts for inline cptlf attached to PF driver
> so that SMMU faults and other errors can be reported.
> 
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>

...

> diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

...

> @@ -760,8 +760,11 @@ static int otx2_cptpf_probe(struct pci_dev *pdev,
>  	if (err)
>  		goto clear_drvdata;
>  
> -	err = pci_alloc_irq_vectors(pdev, RVU_PF_INT_VEC_CNT,
> -				    RVU_PF_INT_VEC_CNT, PCI_IRQ_MSIX);
> +	num_vec = pci_msix_vec_count(cptpf->pdev);
> +	if (num_vec <= 0)
> +		goto clear_drvdata;

Hi Srujana and Nithin,

This branch will result in the function returning err.
However, err is set to 0 here. Perhaps it should
be set to a negative error value instead.

As flagged by Smatch.

> +
> +	err = pci_alloc_irq_vectors(pdev, num_vec, num_vec, PCI_IRQ_MSIX);
>  	if (err < 0) {
>  		dev_err(dev, "Request for %d msix vectors failed\n",
>  			RVU_PF_INT_VEC_CNT);

...

  reply	other threads:[~2023-11-19 19:54 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-03  5:32 [PATCH v1 00/10] Add Marvell CN10KB/CN10KA B0 support Srujana Challa
2023-11-03  5:32 ` [PATCH v1 01/10] crypto: octeontx2: remove CPT block reset Srujana Challa
2023-11-03  5:32 ` [PATCH v1 02/10] crypto: octeontx2: add SGv2 support for CN10KB or CN10KA B0 Srujana Challa
2023-11-19 19:49   ` Simon Horman
2023-11-20  3:18   ` Kalesh Anakkur Purayil
2023-11-03  5:32 ` [PATCH v1 03/10] crypto: octeontx2: add devlink option to set max_rxc_icb_cnt Srujana Challa
2023-11-03  5:33 ` [PATCH v1 04/10] crypto: octeontx2: add devlink option to set t106 mode Srujana Challa
2023-11-03  5:33 ` [PATCH v1 05/10] crypto: octeontx2: remove errata workaround for CN10KB or CN10KA B0 chip Srujana Challa
2023-11-03  5:33 ` [PATCH v1 06/10] crypto: octeontx2: add LF reset on queue disable Srujana Challa
2023-11-03  5:33 ` [PATCH v1 07/10] octeontx2-af: update CPT inbound inline IPsec mailbox Srujana Challa
2023-11-03  5:33 ` [PATCH v1 08/10] crypto: octeontx2: add ctx_val workaround Srujana Challa
2023-11-03  5:33 ` [PATCH v1 09/10] crypto/octeontx2: register error interrupts for inline cptlf Srujana Challa
2023-11-19 19:54   ` Simon Horman [this message]
2023-11-03  5:33 ` [PATCH v1 10/10] crypto: octeontx2: support setting ctx ilen for inline CPT LF Srujana Challa
2023-11-17 10:25 ` [PATCH v1 00/10] Add Marvell CN10KB/CN10KA B0 support Herbert Xu

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