From: Simon Horman <horms@kernel.org>
To: Srujana Challa <schalla@marvell.com>
Cc: herbert@gondor.apana.org.au, davem@davemloft.net,
kuba@kernel.org, linux-crypto@vger.kernel.org,
netdev@vger.kernel.org, linux-doc@vger.kernel.org,
bbrezillon@kernel.org, arno@natisbad.org, pabeni@redhat.com,
edumazet@google.com, corbet@lwn.net, sgoutham@marvell.com,
bbhushan2@marvell.com, jerinj@marvell.com, sbhatta@marvell.com,
hkelam@marvell.com, lcherian@marvell.com, gakula@marvell.com,
ndabilpuram@marvell.com
Subject: Re: [PATCH net-next v1 09/10] crypto/octeontx2: register error interrupts for inline cptlf
Date: Mon, 11 Dec 2023 17:15:30 +0000 [thread overview]
Message-ID: <20231211171530.GP5817@kernel.org> (raw)
In-Reply-To: <20231211071913.151225-10-schalla@marvell.com>
On Mon, Dec 11, 2023 at 12:49:12PM +0530, Srujana Challa wrote:
> From: Nithin Dabilpuram <ndabilpuram@marvell.com>
>
> Register errors interrupts for inline cptlf attached to PF driver
> so that SMMU faults and other errors can be reported.
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
...
> diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
> index 7d44b54659bf..79afa3a451a7 100644
> --- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
> +++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
> @@ -725,7 +725,7 @@ static int otx2_cptpf_probe(struct pci_dev *pdev,
> {
> struct device *dev = &pdev->dev;
> struct otx2_cptpf_dev *cptpf;
> - int err;
> + int err, num_vec;
>
> cptpf = devm_kzalloc(dev, sizeof(*cptpf), GFP_KERNEL);
> if (!cptpf)
> @@ -760,8 +760,11 @@ static int otx2_cptpf_probe(struct pci_dev *pdev,
> if (err)
> goto clear_drvdata;
>
> - err = pci_alloc_irq_vectors(pdev, RVU_PF_INT_VEC_CNT,
> - RVU_PF_INT_VEC_CNT, PCI_IRQ_MSIX);
> + num_vec = pci_msix_vec_count(cptpf->pdev);
> + if (num_vec <= 0)
> + goto clear_drvdata;
Hi Srujana and Nithin,
This goto will result in the function returning err.
However, err is 0 here. Perhaps it should be set to
a negative error value instead?
Flagged by Smatch.
> +
> + err = pci_alloc_irq_vectors(pdev, num_vec, num_vec, PCI_IRQ_MSIX);
> if (err < 0) {
> dev_err(dev, "Request for %d msix vectors failed\n",
> RVU_PF_INT_VEC_CNT);
...
next prev parent reply other threads:[~2023-12-11 17:15 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-11 7:19 [PATCH net-next v1 00/10] Add Marvell CPT CN10KB/CN10KA B0 support Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 01/10] crypto: octeontx2: remove CPT block reset Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 02/10] :crypto: octeontx2: add SGv2 support for CN10KB or CN10KA B0 Srujana Challa
2023-12-11 8:12 ` Kalesh Anakkur Purayil
2023-12-11 7:19 ` [PATCH net-next v1 03/10] crypto: octeontx2: add devlink option to set max_rxc_icb_cnt Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 04/10] crypto: octeontx2: add devlink option to set t106 mode Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 05/10] crypto: octeontx2: remove errata workaround for CN10KB or CN10KA B0 chip Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 06/10] crypto: octeontx2: add LF reset on queue disable Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 07/10] octeontx2-af: update CPT inbound inline IPsec mailbox Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 08/10] crypto: octeontx2: add ctx_val workaround Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 09/10] crypto/octeontx2: register error interrupts for inline cptlf Srujana Challa
2023-12-11 17:15 ` Simon Horman [this message]
2023-12-11 7:19 ` [PATCH net-next v1 10/10] crypto: octeontx2: support setting ctx ilen for inline CPT LF Srujana Challa
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