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Date: Thu, 4 Jan 2024 14:50:41 -0800
From: Jakub Kicinski <kuba@kernel.org>
To: Saeed Mahameed <saeed@kernel.org>
Cc: "David S. Miller" <davem@davemloft.net>, Paolo Abeni
 <pabeni@redhat.com>, Eric Dumazet <edumazet@google.com>, Saeed Mahameed
 <saeedm@nvidia.com>, netdev@vger.kernel.org, Tariq Toukan
 <tariqt@nvidia.com>, Gal Pressman <gal@nvidia.com>
Subject: Re: [net-next 10/15] net/mlx5e: Let channels be SD-aware
Message-ID: <20240104145041.67475695@kernel.org>
In-Reply-To: <20231221005721.186607-11-saeed@kernel.org>
References: <20231221005721.186607-1-saeed@kernel.org>
	<20231221005721.186607-11-saeed@kernel.org>
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On Wed, 20 Dec 2023 16:57:16 -0800 Saeed Mahameed wrote:
> Example for 2 mdevs and 6 channels:
> +-------+---------+
> | ch ix | mdev ix |
> +-------+---------+
> |   0   |    0    |
> |   1   |    1    |
> |   2   |    0    |
> |   3   |    1    |
> |   4   |    0    |
> |   5   |    1    |
> +-------+---------+

Meaning Rx queue 0 goes to PF 0, Rx queue 1 goes to PF 1, etc.?
Is the user then expected to magic pixie dust the XPS or some such
to get to the right queue?

How is this going to get represented in the recently merged Netlink
queue API?