From: Elad Yifee <eladwf@gmail.com>
Cc: eladwf@gmail.com, Sam.Shih@mediatek.com, steven.liu@mediatek.com,
bc-bocun.chen@mediatek.com, SkyLake.Huang@mediatek.com,
Henry.Yen@mediatek.com, john@phrozen.org,
Felix Fietkau <nbd@nbd.name>, Sean Wang <sean.wang@mediatek.com>,
Mark Lee <Mark-MC.Lee@mediatek.com>,
Lorenzo Bianconi <lorenzo@kernel.org>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: [PATCH net RFC] net: ethernet: mtk_eth_soc: ppe: add source port comparison
Date: Sat, 11 May 2024 15:42:26 +0300 [thread overview]
Message-ID: <20240511124230.13991-1-eladwf@gmail.com> (raw)
Resolve packet loss issue on the following conditions:
- utilizing multiple GMACs
- device has more than 4GB DRAM
- using PPE
Signed-off-by: Elad Yifee <eladwf@gmail.com>
---
drivers/net/ethernet/mediatek/mtk_ppe.c | 4 ++++
drivers/net/ethernet/mediatek/mtk_ppe_regs.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.c b/drivers/net/ethernet/mediatek/mtk_ppe.c
index 6ce0db3a1a92..6415ba618ebf 100644
--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
@@ -1053,6 +1053,10 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
MTK_PPE_GLO_CFG_IP4_L4_CS_DROP |
MTK_PPE_GLO_CFG_IP4_CS_DROP |
MTK_PPE_GLO_CFG_FLOW_DROP_UPDATE;
+
+ if (mtk_is_netsys_v2_or_greater(ppe->eth))
+ val |= MTK_PPE_GLO_CFG_SP_CMP_EN;
+
ppe_w32(ppe, MTK_PPE_GLO_CFG, val);
ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT, 0);
diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_regs.h b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h
index 3ce088eef0ef..61fea4b4b65b 100644
--- a/drivers/net/ethernet/mediatek/mtk_ppe_regs.h
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h
@@ -18,6 +18,7 @@
#define MTK_PPE_GLO_CFG_UDP_LITE_EN BIT(10)
#define MTK_PPE_GLO_CFG_UDP_LEN_DROP BIT(11)
#define MTK_PPE_GLO_CFG_MCAST_ENTRIES GNEMASK(13, 12)
+#define MTK_PPE_GLO_CFG_SP_CMP_EN BIT(25)
#define MTK_PPE_GLO_CFG_BUSY BIT(31)
#define MTK_PPE_FLOW_CFG 0x204
--
2.44.0
reply other threads:[~2024-05-11 12:44 UTC|newest]
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