[PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY

[Chris Packham <chris.packham@alliedtelesis.co.nz>]

The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
clause 45 MDIO interface and can leverage the support that has already
been added for the other 822x PHYs.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    I'm currently testing this on an older kernel because the board I'm
    using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
    I have tried to selectively back port the bits I need from the other
    rtl822x work so this should be all that is required for the rtl8224.
    
    There's quite a lot that would need forward porting get a working system
    against a current kernel so hopefully this is small enough that it can
    land while I'm trying to figure out how to untangle all the other bits.
    
    One thing that may appear lacking is the lack of rate_matching support.
    According to the documentation I have know the interface used on the
    RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
    trying to get things completely working that may change if I get new
    information.

 drivers/net/phy/realtek.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 7ab41f95dae5..2174893c974f 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] = {
 		.resume         = rtlgen_resume,
 		.read_page      = rtl821x_read_page,
 		.write_page     = rtl821x_write_page,
+	}, {
+		PHY_ID_MATCH_EXACT(0x001ccad0),
+		.name		= "RTL8224 2.5Gbps PHY",
+		.get_features   = rtl822x_c45_get_features,
+		.config_aneg    = rtl822x_c45_config_aneg,
+		.read_status    = rtl822x_c45_read_status,
+		.suspend        = genphy_c45_pma_suspend,
+		.resume         = rtlgen_c45_resume,
 	}, {
 		PHY_ID_MATCH_EXACT(0x001cc961),
 		.name		= "RTL8366RB Gigabit Ethernet",
-- 
2.45.2