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* [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
@ 2024-06-11  5:34 Chris Packham
  2024-06-11 13:21 ` Andrew Lunn
                   ` (2 more replies)
  0 siblings, 3 replies; 11+ messages in thread
From: Chris Packham @ 2024-06-11  5:34 UTC (permalink / raw)
  To: andrew, hkallweit1, linux, davem, edumazet, kuba, pabeni
  Cc: netdev, linux-kernel, Chris Packham

The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
clause 45 MDIO interface and can leverage the support that has already
been added for the other 822x PHYs.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    I'm currently testing this on an older kernel because the board I'm
    using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
    I have tried to selectively back port the bits I need from the other
    rtl822x work so this should be all that is required for the rtl8224.
    
    There's quite a lot that would need forward porting get a working system
    against a current kernel so hopefully this is small enough that it can
    land while I'm trying to figure out how to untangle all the other bits.
    
    One thing that may appear lacking is the lack of rate_matching support.
    According to the documentation I have know the interface used on the
    RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
    trying to get things completely working that may change if I get new
    information.

 drivers/net/phy/realtek.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 7ab41f95dae5..2174893c974f 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] = {
 		.resume         = rtlgen_resume,
 		.read_page      = rtl821x_read_page,
 		.write_page     = rtl821x_write_page,
+	}, {
+		PHY_ID_MATCH_EXACT(0x001ccad0),
+		.name		= "RTL8224 2.5Gbps PHY",
+		.get_features   = rtl822x_c45_get_features,
+		.config_aneg    = rtl822x_c45_config_aneg,
+		.read_status    = rtl822x_c45_read_status,
+		.suspend        = genphy_c45_pma_suspend,
+		.resume         = rtlgen_c45_resume,
 	}, {
 		PHY_ID_MATCH_EXACT(0x001cc961),
 		.name		= "RTL8366RB Gigabit Ethernet",
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-11  5:34 [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY Chris Packham
@ 2024-06-11 13:21 ` Andrew Lunn
  2024-06-11 20:41   ` Chris Packham
  2024-06-11 20:42 ` Chris Packham
  2024-06-15  2:00 ` patchwork-bot+netdevbpf
  2 siblings, 1 reply; 11+ messages in thread
From: Andrew Lunn @ 2024-06-11 13:21 UTC (permalink / raw)
  To: Chris Packham
  Cc: hkallweit1, linux, davem, edumazet, kuba, pabeni, netdev,
	linux-kernel

On Tue, Jun 11, 2024 at 05:34:14PM +1200, Chris Packham wrote:
> The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
> clause 45 MDIO interface and can leverage the support that has already
> been added for the other 822x PHYs.
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

You probably should Cc: Eric Woudstra and Marek Behún who have both
worked on 2.5G variants of this PHY.

> Notes:
>     I'm currently testing this on an older kernel because the board I'm
>     using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
>     I have tried to selectively back port the bits I need from the other
>     rtl822x work so this should be all that is required for the rtl8224.
>     
>     There's quite a lot that would need forward porting get a working system
>     against a current kernel so hopefully this is small enough that it can
>     land while I'm trying to figure out how to untangle all the other bits.
     
I don't see this as being a problem. It should not be possible to
cause regressions by adding a new device like this. If it turns out to
be broken, you can fix it up later.

	Andrew

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-11 13:21 ` Andrew Lunn
@ 2024-06-11 20:41   ` Chris Packham
  0 siblings, 0 replies; 11+ messages in thread
From: Chris Packham @ 2024-06-11 20:41 UTC (permalink / raw)
  To: Andrew Lunn
  Cc: hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net,
	edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org


On 12/06/24 01:21, Andrew Lunn wrote:
> On Tue, Jun 11, 2024 at 05:34:14PM +1200, Chris Packham wrote:
>> The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
>> clause 45 MDIO interface and can leverage the support that has already
>> been added for the other 822x PHYs.
>>
>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> You probably should Cc: Eric Woudstra and Marek Behún who have both
> worked on 2.5G variants of this PHY.
>
Hmm get_maintainer.pl didn't pick them up but does with the --git 
option. Did something change with that recently? Or maybe I'm just 
running it wrong. I'll add Cc them on the original patch and include 
them if there is a v2.

>> Notes:
>>      I'm currently testing this on an older kernel because the board I'm
>>      using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
>>      I have tried to selectively back port the bits I need from the other
>>      rtl822x work so this should be all that is required for the rtl8224.
>>      
>>      There's quite a lot that would need forward porting get a working system
>>      against a current kernel so hopefully this is small enough that it can
>>      land while I'm trying to figure out how to untangle all the other bits.
>       
> I don't see this as being a problem. It should not be possible to
> cause regressions by adding a new device like this. If it turns out to
> be broken, you can fix it up later.
>
> 	Andrew

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-11  5:34 [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY Chris Packham
  2024-06-11 13:21 ` Andrew Lunn
@ 2024-06-11 20:42 ` Chris Packham
  2024-06-12  7:07   ` Marek Behún
  2024-06-15  2:00 ` patchwork-bot+netdevbpf
  2 siblings, 1 reply; 11+ messages in thread
From: Chris Packham @ 2024-06-11 20:42 UTC (permalink / raw)
  To: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk,
	davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	pabeni@redhat.com
  Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	ericwouds@gmail.com, Marek Behún

+cc Eric W and Marek.

On 11/06/24 17:34, Chris Packham wrote:
> The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
> clause 45 MDIO interface and can leverage the support that has already
> been added for the other 822x PHYs.
>
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
>
> Notes:
>      I'm currently testing this on an older kernel because the board I'm
>      using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
>      I have tried to selectively back port the bits I need from the other
>      rtl822x work so this should be all that is required for the rtl8224.
>      
>      There's quite a lot that would need forward porting get a working system
>      against a current kernel so hopefully this is small enough that it can
>      land while I'm trying to figure out how to untangle all the other bits.
>      
>      One thing that may appear lacking is the lack of rate_matching support.
>      According to the documentation I have know the interface used on the
>      RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
>      trying to get things completely working that may change if I get new
>      information.
>
>   drivers/net/phy/realtek.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
>
> diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
> index 7ab41f95dae5..2174893c974f 100644
> --- a/drivers/net/phy/realtek.c
> +++ b/drivers/net/phy/realtek.c
> @@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] = {
>   		.resume         = rtlgen_resume,
>   		.read_page      = rtl821x_read_page,
>   		.write_page     = rtl821x_write_page,
> +	}, {
> +		PHY_ID_MATCH_EXACT(0x001ccad0),
> +		.name		= "RTL8224 2.5Gbps PHY",
> +		.get_features   = rtl822x_c45_get_features,
> +		.config_aneg    = rtl822x_c45_config_aneg,
> +		.read_status    = rtl822x_c45_read_status,
> +		.suspend        = genphy_c45_pma_suspend,
> +		.resume         = rtlgen_c45_resume,
>   	}, {
>   		PHY_ID_MATCH_EXACT(0x001cc961),
>   		.name		= "RTL8366RB Gigabit Ethernet",

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-11 20:42 ` Chris Packham
@ 2024-06-12  7:07   ` Marek Behún
  2024-06-12 20:39     ` Chris Packham
  2024-06-14  8:18     ` Paolo Abeni
  0 siblings, 2 replies; 11+ messages in thread
From: Marek Behún @ 2024-06-12  7:07 UTC (permalink / raw)
  To: Chris Packham
  Cc: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk,
	davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	pabeni@redhat.com, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, ericwouds@gmail.com

On Tue, 11 Jun 2024 20:42:43 +0000
Chris Packham <Chris.Packham@alliedtelesis.co.nz> wrote:

> +cc Eric W and Marek.
> 
> On 11/06/24 17:34, Chris Packham wrote:
> > The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
> > clause 45 MDIO interface and can leverage the support that has already
> > been added for the other 822x PHYs.
> >
> > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> > ---
> >
> > Notes:
> >      I'm currently testing this on an older kernel because the board I'm
> >      using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
> >      I have tried to selectively back port the bits I need from the other
> >      rtl822x work so this should be all that is required for the rtl8224.
> >      
> >      There's quite a lot that would need forward porting get a working system
> >      against a current kernel so hopefully this is small enough that it can
> >      land while I'm trying to figure out how to untangle all the other bits.
> >      
> >      One thing that may appear lacking is the lack of rate_matching support.
> >      According to the documentation I have know the interface used on the
> >      RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
> >      trying to get things completely working that may change if I get new
> >      information.
> >
> >   drivers/net/phy/realtek.c | 8 ++++++++
> >   1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
> > index 7ab41f95dae5..2174893c974f 100644
> > --- a/drivers/net/phy/realtek.c
> > +++ b/drivers/net/phy/realtek.c
> > @@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] = {
> >   		.resume         = rtlgen_resume,
> >   		.read_page      = rtl821x_read_page,
> >   		.write_page     = rtl821x_write_page,
> > +	}, {
> > +		PHY_ID_MATCH_EXACT(0x001ccad0),
> > +		.name		= "RTL8224 2.5Gbps PHY",
> > +		.get_features   = rtl822x_c45_get_features,
> > +		.config_aneg    = rtl822x_c45_config_aneg,
> > +		.read_status    = rtl822x_c45_read_status,
> > +		.suspend        = genphy_c45_pma_suspend,
> > +		.resume         = rtlgen_c45_resume,
> >   	}, {
> >   		PHY_ID_MATCH_EXACT(0x001cc961),
> >   		.name		= "RTL8366RB Gigabit Ethernet"  

Don't you need rtl822xb_config_init for serdes configuration?

Marek

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-12  7:07   ` Marek Behún
@ 2024-06-12 20:39     ` Chris Packham
  2024-06-14  8:18     ` Paolo Abeni
  1 sibling, 0 replies; 11+ messages in thread
From: Chris Packham @ 2024-06-12 20:39 UTC (permalink / raw)
  To: Marek Behún
  Cc: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk,
	davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	pabeni@redhat.com, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, ericwouds@gmail.com


On 12/06/24 19:07, Marek Behún wrote:
> On Tue, 11 Jun 2024 20:42:43 +0000
> Chris Packham <Chris.Packham@alliedtelesis.co.nz> wrote:
>
>> +cc Eric W and Marek.
>>
>> On 11/06/24 17:34, Chris Packham wrote:
>>> The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
>>> clause 45 MDIO interface and can leverage the support that has already
>>> been added for the other 822x PHYs.
>>>
>>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>>> ---
>>>
>>> Notes:
>>>       I'm currently testing this on an older kernel because the board I'm
>>>       using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
>>>       I have tried to selectively back port the bits I need from the other
>>>       rtl822x work so this should be all that is required for the rtl8224.
>>>       
>>>       There's quite a lot that would need forward porting get a working system
>>>       against a current kernel so hopefully this is small enough that it can
>>>       land while I'm trying to figure out how to untangle all the other bits.
>>>       
>>>       One thing that may appear lacking is the lack of rate_matching support.
>>>       According to the documentation I have know the interface used on the
>>>       RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
>>>       trying to get things completely working that may change if I get new
>>>       information.
>>>
>>>    drivers/net/phy/realtek.c | 8 ++++++++
>>>    1 file changed, 8 insertions(+)
>>>
>>> diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
>>> index 7ab41f95dae5..2174893c974f 100644
>>> --- a/drivers/net/phy/realtek.c
>>> +++ b/drivers/net/phy/realtek.c
>>> @@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] = {
>>>    		.resume         = rtlgen_resume,
>>>    		.read_page      = rtl821x_read_page,
>>>    		.write_page     = rtl821x_write_page,
>>> +	}, {
>>> +		PHY_ID_MATCH_EXACT(0x001ccad0),
>>> +		.name		= "RTL8224 2.5Gbps PHY",
>>> +		.get_features   = rtl822x_c45_get_features,
>>> +		.config_aneg    = rtl822x_c45_config_aneg,
>>> +		.read_status    = rtl822x_c45_read_status,
>>> +		.suspend        = genphy_c45_pma_suspend,
>>> +		.resume         = rtlgen_c45_resume,
>>>    	}, {
>>>    		PHY_ID_MATCH_EXACT(0x001cc961),
>>>    		.name		= "RTL8366RB Gigabit Ethernet"
> Don't you need rtl822xb_config_init for serdes configuration?

I more than likely need a config_init() function. I'm working with 
incomplete datasheets so I'm not sure if rtl822xb_config_init() will 
work for me (if anyone has a contact at Realtek I'd like to hear from 
you). The MAC-PHY interface on the RTL8224 is qusxgmii and 
rtl822xb_config_init() seems to only cater for 2500base-x or hsgmii so I 
think I will need a different config_init() but quite what that looks 
like I'm not sure.

That's also where I start running into the backporting problem because 
the rtl822xb_config_init() decides the mode based on the host_interfaces 
which doesn't exist in the kernel I have dsa drivers for. I do plan on 
trying to bring the code I have forward but there's quite a lot I need 
to sift through.

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-12  7:07   ` Marek Behún
  2024-06-12 20:39     ` Chris Packham
@ 2024-06-14  8:18     ` Paolo Abeni
  2024-06-14  8:25       ` Marek Behún
  1 sibling, 1 reply; 11+ messages in thread
From: Paolo Abeni @ 2024-06-14  8:18 UTC (permalink / raw)
  To: Marek Behún, Chris Packham
  Cc: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk,
	davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	ericwouds@gmail.com

On Wed, 2024-06-12 at 09:07 +0200, Marek Behún wrote:
> On Tue, 11 Jun 2024 20:42:43 +0000
> Chris Packham <Chris.Packham@alliedtelesis.co.nz> wrote:
> 
> > +cc Eric W and Marek.
> > 
> > On 11/06/24 17:34, Chris Packham wrote:
> > > The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
> > > clause 45 MDIO interface and can leverage the support that has already
> > > been added for the other 822x PHYs.
> > > 
> > > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> > > ---
> > > 
> > > Notes:
> > >      I'm currently testing this on an older kernel because the board I'm
> > >      using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
> > >      I have tried to selectively back port the bits I need from the other
> > >      rtl822x work so this should be all that is required for the rtl8224.
> > >      
> > >      There's quite a lot that would need forward porting get a working system
> > >      against a current kernel so hopefully this is small enough that it can
> > >      land while I'm trying to figure out how to untangle all the other bits.
> > >      
> > >      One thing that may appear lacking is the lack of rate_matching support.
> > >      According to the documentation I have know the interface used on the
> > >      RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
> > >      trying to get things completely working that may change if I get new
> > >      information.
> > > 
> > >   drivers/net/phy/realtek.c | 8 ++++++++
> > >   1 file changed, 8 insertions(+)
> > > 
> > > diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
> > > index 7ab41f95dae5..2174893c974f 100644
> > > --- a/drivers/net/phy/realtek.c
> > > +++ b/drivers/net/phy/realtek.c
> > > @@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] = {
> > >   		.resume         = rtlgen_resume,
> > >   		.read_page      = rtl821x_read_page,
> > >   		.write_page     = rtl821x_write_page,
> > > +	}, {
> > > +		PHY_ID_MATCH_EXACT(0x001ccad0),
> > > +		.name		= "RTL8224 2.5Gbps PHY",
> > > +		.get_features   = rtl822x_c45_get_features,
> > > +		.config_aneg    = rtl822x_c45_config_aneg,
> > > +		.read_status    = rtl822x_c45_read_status,
> > > +		.suspend        = genphy_c45_pma_suspend,
> > > +		.resume         = rtlgen_c45_resume,
> > >   	}, {
> > >   		PHY_ID_MATCH_EXACT(0x001cc961),
> > >   		.name		= "RTL8366RB Gigabit Ethernet"  
> 
> Don't you need rtl822xb_config_init for serdes configuration?

Marek, I read the above as you would prefer to have such support
included from the beginning, as such I'm looking forward a new version
of this patch.

Please raise a hand if I read too much in your reply.

Thanks!

Paolo


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-14  8:18     ` Paolo Abeni
@ 2024-06-14  8:25       ` Marek Behún
  2024-06-16 21:24         ` Chris Packham
  0 siblings, 1 reply; 11+ messages in thread
From: Marek Behún @ 2024-06-14  8:25 UTC (permalink / raw)
  To: Paolo Abeni
  Cc: Chris Packham, andrew@lunn.ch, hkallweit1@gmail.com,
	linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com,
	kuba@kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, ericwouds@gmail.com

On Fri, 14 Jun 2024 10:18:47 +0200
Paolo Abeni <pabeni@redhat.com> wrote:

> On Wed, 2024-06-12 at 09:07 +0200, Marek Behún wrote:
> > On Tue, 11 Jun 2024 20:42:43 +0000
> > Chris Packham <Chris.Packham@alliedtelesis.co.nz> wrote:
> >   
> > > +cc Eric W and Marek.
> > > 
> > > On 11/06/24 17:34, Chris Packham wrote:  
> > > > The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
> > > > clause 45 MDIO interface and can leverage the support that has already
> > > > been added for the other 822x PHYs.
> > > > 
> > > > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> > > > ---
> > > > 
> > > > Notes:
> > > >      I'm currently testing this on an older kernel because the board I'm
> > > >      using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
> > > >      I have tried to selectively back port the bits I need from the other
> > > >      rtl822x work so this should be all that is required for the rtl8224.
> > > >      
> > > >      There's quite a lot that would need forward porting get a working system
> > > >      against a current kernel so hopefully this is small enough that it can
> > > >      land while I'm trying to figure out how to untangle all the other bits.
> > > >      
> > > >      One thing that may appear lacking is the lack of rate_matching support.
> > > >      According to the documentation I have know the interface used on the
> > > >      RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
> > > >      trying to get things completely working that may change if I get new
> > > >      information.
> > > > 
> > > >   drivers/net/phy/realtek.c | 8 ++++++++
> > > >   1 file changed, 8 insertions(+)
> > > > 
> > > > diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
> > > > index 7ab41f95dae5..2174893c974f 100644
> > > > --- a/drivers/net/phy/realtek.c
> > > > +++ b/drivers/net/phy/realtek.c
> > > > @@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] = {
> > > >   		.resume         = rtlgen_resume,
> > > >   		.read_page      = rtl821x_read_page,
> > > >   		.write_page     = rtl821x_write_page,
> > > > +	}, {
> > > > +		PHY_ID_MATCH_EXACT(0x001ccad0),
> > > > +		.name		= "RTL8224 2.5Gbps PHY",
> > > > +		.get_features   = rtl822x_c45_get_features,
> > > > +		.config_aneg    = rtl822x_c45_config_aneg,
> > > > +		.read_status    = rtl822x_c45_read_status,
> > > > +		.suspend        = genphy_c45_pma_suspend,
> > > > +		.resume         = rtlgen_c45_resume,
> > > >   	}, {
> > > >   		PHY_ID_MATCH_EXACT(0x001cc961),
> > > >   		.name		= "RTL8366RB Gigabit Ethernet"    
> > 
> > Don't you need rtl822xb_config_init for serdes configuration?  
> 
> Marek, I read the above as you would prefer to have such support
> included from the beginning, as such I'm looking forward a new version
> of this patch.
> 
> Please raise a hand if I read too much in your reply.

I am raising my hand :) I just wanted to point it out.
If this code works for Chris' hardware, it is okay even without the
.config_init.

Marek

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-11  5:34 [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY Chris Packham
  2024-06-11 13:21 ` Andrew Lunn
  2024-06-11 20:42 ` Chris Packham
@ 2024-06-15  2:00 ` patchwork-bot+netdevbpf
  2 siblings, 0 replies; 11+ messages in thread
From: patchwork-bot+netdevbpf @ 2024-06-15  2:00 UTC (permalink / raw)
  To: Chris Packham
  Cc: andrew, hkallweit1, linux, davem, edumazet, kuba, pabeni, netdev,
	linux-kernel

Hello:

This patch was applied to netdev/net-next.git (main)
by Jakub Kicinski <kuba@kernel.org>:

On Tue, 11 Jun 2024 17:34:14 +1200 you wrote:
> The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
> clause 45 MDIO interface and can leverage the support that has already
> been added for the other 822x PHYs.
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
> 
> [...]

Here is the summary with links:
  - [next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
    https://git.kernel.org/netdev/net-next/c/9e42a2ea7f67

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-14  8:25       ` Marek Behún
@ 2024-06-16 21:24         ` Chris Packham
  2024-06-17  8:12           ` Marek Behún
  0 siblings, 1 reply; 11+ messages in thread
From: Chris Packham @ 2024-06-16 21:24 UTC (permalink / raw)
  To: Marek Behún, Paolo Abeni
  Cc: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk,
	davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	ericwouds@gmail.com


On 14/06/24 20:25, Marek Behún wrote:
> On Fri, 14 Jun 2024 10:18:47 +0200
> Paolo Abeni <pabeni@redhat.com> wrote:
>
>> On Wed, 2024-06-12 at 09:07 +0200, Marek Behún wrote:
>>> On Tue, 11 Jun 2024 20:42:43 +0000
>>> Chris Packham <Chris.Packham@alliedtelesis.co.nz> wrote:
>>>    
>>>> +cc Eric W and Marek.
>>>>
>>>> On 11/06/24 17:34, Chris Packham wrote:
>>>>> The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
>>>>> clause 45 MDIO interface and can leverage the support that has already
>>>>> been added for the other 822x PHYs.
>>>>>
>>>>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>>>>> ---
>>>>>
>>>>> Notes:
>>>>>       I'm currently testing this on an older kernel because the board I'm
>>>>>       using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
>>>>>       I have tried to selectively back port the bits I need from the other
>>>>>       rtl822x work so this should be all that is required for the rtl8224.
>>>>>       
>>>>>       There's quite a lot that would need forward porting get a working system
>>>>>       against a current kernel so hopefully this is small enough that it can
>>>>>       land while I'm trying to figure out how to untangle all the other bits.
>>>>>       
>>>>>       One thing that may appear lacking is the lack of rate_matching support.
>>>>>       According to the documentation I have know the interface used on the
>>>>>       RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
>>>>>       trying to get things completely working that may change if I get new
>>>>>       information.
>>>>>
>>>>>    drivers/net/phy/realtek.c | 8 ++++++++
>>>>>    1 file changed, 8 insertions(+)
>>>>>
>>>>> diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
>>>>> index 7ab41f95dae5..2174893c974f 100644
>>>>> --- a/drivers/net/phy/realtek.c
>>>>> +++ b/drivers/net/phy/realtek.c
>>>>> @@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] = {
>>>>>    		.resume         = rtlgen_resume,
>>>>>    		.read_page      = rtl821x_read_page,
>>>>>    		.write_page     = rtl821x_write_page,
>>>>> +	}, {
>>>>> +		PHY_ID_MATCH_EXACT(0x001ccad0),
>>>>> +		.name		= "RTL8224 2.5Gbps PHY",
>>>>> +		.get_features   = rtl822x_c45_get_features,
>>>>> +		.config_aneg    = rtl822x_c45_config_aneg,
>>>>> +		.read_status    = rtl822x_c45_read_status,
>>>>> +		.suspend        = genphy_c45_pma_suspend,
>>>>> +		.resume         = rtlgen_c45_resume,
>>>>>    	}, {
>>>>>    		PHY_ID_MATCH_EXACT(0x001cc961),
>>>>>    		.name		= "RTL8366RB Gigabit Ethernet"
>>> Don't you need rtl822xb_config_init for serdes configuration?
>> Marek, I read the above as you would prefer to have such support
>> included from the beginning, as such I'm looking forward a new version
>> of this patch.
>>
>> Please raise a hand if I read too much in your reply.
> I am raising my hand :) I just wanted to point it out.
> If this code works for Chris' hardware, it is okay even without the
> .config_init.

I did look into this. The SERDES configuration seems to be different 
between the RTL8221 and RTL8224. I think that might be because the 
RTL8221 can do a few different host interfaces whereas the RTL8224 is 
really only USXGMII. There are some configurable parameters but they 
appear to be done differently.

Having said that I definitely don't have a system working end to end. I 
know the line side stuff is working well (auto-negotiating speeds from 
10M to 2.5B) but I'm not getting anything on the host side. I'm not sure 
if that's a problem with the switch driver or with the PHY.

I'd like this to go in as it shouldn't regress anything but I can 
understand if the bar is "needs to be 100% working" I'll just have to 
carry this locally until I can be sure.

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
  2024-06-16 21:24         ` Chris Packham
@ 2024-06-17  8:12           ` Marek Behún
  0 siblings, 0 replies; 11+ messages in thread
From: Marek Behún @ 2024-06-17  8:12 UTC (permalink / raw)
  To: Chris Packham
  Cc: Paolo Abeni, andrew@lunn.ch, hkallweit1@gmail.com,
	linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com,
	kuba@kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, ericwouds@gmail.com

On Sun, 16 Jun 2024 21:24:53 +0000
Chris Packham <Chris.Packham@alliedtelesis.co.nz> wrote:

> On 14/06/24 20:25, Marek Behún wrote:
> > On Fri, 14 Jun 2024 10:18:47 +0200
> > Paolo Abeni <pabeni@redhat.com> wrote:
> >  
> >> On Wed, 2024-06-12 at 09:07 +0200, Marek Behún wrote:  
> >>> On Tue, 11 Jun 2024 20:42:43 +0000
> >>> Chris Packham <Chris.Packham@alliedtelesis.co.nz> wrote:
> >>>      
> >>>> +cc Eric W and Marek.
> >>>>
> >>>> On 11/06/24 17:34, Chris Packham wrote:  
> >>>>> The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
> >>>>> clause 45 MDIO interface and can leverage the support that has already
> >>>>> been added for the other 822x PHYs.
> >>>>>
> >>>>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> >>>>> ---
> >>>>>
> >>>>> Notes:
> >>>>>       I'm currently testing this on an older kernel because the board I'm
> >>>>>       using has a SOC/DSA switch that has a driver in openwrt for Linux 5.15.
> >>>>>       I have tried to selectively back port the bits I need from the other
> >>>>>       rtl822x work so this should be all that is required for the rtl8224.
> >>>>>       
> >>>>>       There's quite a lot that would need forward porting get a working system
> >>>>>       against a current kernel so hopefully this is small enough that it can
> >>>>>       land while I'm trying to figure out how to untangle all the other bits.
> >>>>>       
> >>>>>       One thing that may appear lacking is the lack of rate_matching support.
> >>>>>       According to the documentation I have know the interface used on the
> >>>>>       RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
> >>>>>       trying to get things completely working that may change if I get new
> >>>>>       information.
> >>>>>
> >>>>>    drivers/net/phy/realtek.c | 8 ++++++++
> >>>>>    1 file changed, 8 insertions(+)
> >>>>>
> >>>>> diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
> >>>>> index 7ab41f95dae5..2174893c974f 100644
> >>>>> --- a/drivers/net/phy/realtek.c
> >>>>> +++ b/drivers/net/phy/realtek.c
> >>>>> @@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] = {
> >>>>>    		.resume         = rtlgen_resume,
> >>>>>    		.read_page      = rtl821x_read_page,
> >>>>>    		.write_page     = rtl821x_write_page,
> >>>>> +	}, {
> >>>>> +		PHY_ID_MATCH_EXACT(0x001ccad0),
> >>>>> +		.name		= "RTL8224 2.5Gbps PHY",
> >>>>> +		.get_features   = rtl822x_c45_get_features,
> >>>>> +		.config_aneg    = rtl822x_c45_config_aneg,
> >>>>> +		.read_status    = rtl822x_c45_read_status,
> >>>>> +		.suspend        = genphy_c45_pma_suspend,
> >>>>> +		.resume         = rtlgen_c45_resume,
> >>>>>    	}, {
> >>>>>    		PHY_ID_MATCH_EXACT(0x001cc961),
> >>>>>    		.name		= "RTL8366RB Gigabit Ethernet"  
> >>> Don't you need rtl822xb_config_init for serdes configuration?  
> >> Marek, I read the above as you would prefer to have such support
> >> included from the beginning, as such I'm looking forward a new version
> >> of this patch.
> >>
> >> Please raise a hand if I read too much in your reply.  
> > I am raising my hand :) I just wanted to point it out.
> > If this code works for Chris' hardware, it is okay even without the
> > .config_init.  
> 
> I did look into this. The SERDES configuration seems to be different 
> between the RTL8221 and RTL8224. I think that might be because the 
> RTL8221 can do a few different host interfaces whereas the RTL8224 is 
> really only USXGMII. There are some configurable parameters but they 
> appear to be done differently.
> 
> Having said that I definitely don't have a system working end to end. I 
> know the line side stuff is working well (auto-negotiating speeds from 
> 10M to 2.5B) but I'm not getting anything on the host side. I'm not sure 
> if that's a problem with the switch driver or with the PHY.
> 
> I'd like this to go in as it shouldn't regress anything but I can 
> understand if the bar is "needs to be 100% working" I'll just have to 
> carry this locally until I can be sure.

If it doesn't work, it can confuse people that it is working if it is
accepted...

Try to contact Realtek via the contact I sent you in the private
e-mail, maybe you'll be able to make this work.

Marek

^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2024-06-17  8:12 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-06-11  5:34 [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY Chris Packham
2024-06-11 13:21 ` Andrew Lunn
2024-06-11 20:41   ` Chris Packham
2024-06-11 20:42 ` Chris Packham
2024-06-12  7:07   ` Marek Behún
2024-06-12 20:39     ` Chris Packham
2024-06-14  8:18     ` Paolo Abeni
2024-06-14  8:25       ` Marek Behún
2024-06-16 21:24         ` Chris Packham
2024-06-17  8:12           ` Marek Behún
2024-06-15  2:00 ` patchwork-bot+netdevbpf

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