From: Christophe Roullier <christophe.roullier@foss.st.com>
To: "David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Richard Cochran <richardcochran@gmail.com>,
Jose Abreu <joabreu@synopsys.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Christophe Roullier <christophe.roullier@foss.st.com>,
Marek Vasut <marex@denx.de>
Cc: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v2 2/3] arm64: dts: st: add eth2 pinctrl entries in stm32mp25-pinctrl.dtsi
Date: Wed, 19 Jun 2024 14:58:14 +0200 [thread overview]
Message-ID: <20240619125815.358207-3-christophe.roullier@foss.st.com> (raw)
In-Reply-To: <20240619125815.358207-1-christophe.roullier@foss.st.com>
Add pinctrl entry related to ETH2 in stm32mp25-pinctrl.dtsi
ethernet2: RGMII with crystal.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
---
arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 59 +++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
index 7a82896dcbf6..9b2512ad197f 100644
--- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
@@ -6,6 +6,65 @@
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
+ eth2_rgmii_pins_a: eth2-rgmii-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('C', 7, AF10)>, /* ETH_RGMII_TXD0 */
+ <STM32_PINMUX('C', 8, AF10)>, /* ETH_RGMII_TXD1 */
+ <STM32_PINMUX('C', 9, AF10)>, /* ETH_RGMII_TXD2 */
+ <STM32_PINMUX('C', 10, AF10)>, /* ETH_RGMII_TXD3 */
+ <STM32_PINMUX('C', 4, AF10)>; /* ETH_RGMII_TX_CTL */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <3>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 8, AF10)>, /* ETH_RGMII_CLK125 */
+ <STM32_PINMUX('F', 7, AF10)>, /* ETH_RGMII_GTX_CLK */
+ <STM32_PINMUX('C', 6, AF10)>; /* ETH_MDC */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <3>;
+ };
+ pins3 {
+ pinmux = <STM32_PINMUX('C', 5, AF10)>; /* ETH_MDIO */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins4 {
+ pinmux = <STM32_PINMUX('G', 0, AF10)>, /* ETH_RGMII_RXD0 */
+ <STM32_PINMUX('C', 12, AF10)>, /* ETH_RGMII_RXD1 */
+ <STM32_PINMUX('F', 9, AF10)>, /* ETH_RGMII_RXD2 */
+ <STM32_PINMUX('C', 11, AF10)>, /* ETH_RGMII_RXD3 */
+ <STM32_PINMUX('C', 3, AF10)>; /* ETH_RGMII_RX_CTL */
+ bias-disable;
+ };
+ pins5 {
+ pinmux = <STM32_PINMUX('F', 6, AF10)>; /* ETH_RGMII_RX_CLK */
+ bias-disable;
+ };
+ };
+
+ eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('C', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
+ <STM32_PINMUX('C', 8, ANALOG)>, /* ETH_RGMII_TXD1 */
+ <STM32_PINMUX('C', 9, ANALOG)>, /* ETH_RGMII_TXD2 */
+ <STM32_PINMUX('C', 10, ANALOG)>, /* ETH_RGMII_TXD3 */
+ <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_TX_CTL */
+ <STM32_PINMUX('F', 8, ANALOG)>, /* ETH_RGMII_CLK125 */
+ <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_GTX_CLK */
+ <STM32_PINMUX('C', 6, ANALOG)>, /* ETH_MDC */
+ <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_MDIO */
+ <STM32_PINMUX('G', 0, ANALOG)>, /* ETH_RGMII_RXD0 */
+ <STM32_PINMUX('C', 12, ANALOG)>, /* ETH_RGMII_RXD1 */
+ <STM32_PINMUX('F', 9, ANALOG)>, /* ETH_RGMII_RXD2 */
+ <STM32_PINMUX('C', 11, ANALOG)>, /* ETH_RGMII_RXD3 */
+ <STM32_PINMUX('C', 3, ANALOG)>, /* ETH_RGMII_RX_CTL */
+ <STM32_PINMUX('F', 6, ANALOG)>; /* ETH_RGMII_RX_CLK */
+ };
+ };
+
i2c2_pins_a: i2c2-0 {
pins {
pinmux = <STM32_PINMUX('B', 5, AF9)>, /* I2C2_SCL */
--
2.25.1
next prev parent reply other threads:[~2024-06-19 13:00 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-19 12:58 [PATCH v2 0/3] Series DTs to deliver Ethernet for STM32MP25 Christophe Roullier
2024-06-19 12:58 ` [PATCH v2 1/3] arm64: dts: st: add ethernet1 and ethernet2 support on stm32mp25 Christophe Roullier
2024-06-19 13:44 ` Marek Vasut
2024-06-19 12:58 ` Christophe Roullier [this message]
2024-06-19 13:45 ` [PATCH v2 2/3] arm64: dts: st: add eth2 pinctrl entries in stm32mp25-pinctrl.dtsi Marek Vasut
2024-06-19 12:58 ` [PATCH v2 3/3] arm64: dts: st: enable Ethernet2 on stm32mp257f-ev1 board Christophe Roullier
2024-06-19 13:45 ` Marek Vasut
2024-06-27 14:33 ` [PATCH v2 0/3] Series DTs to deliver Ethernet for STM32MP25 Alexandre TORGUE
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