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From: Simon Horman <horms@kernel.org>
To: Karol Kolacinski <karol.kolacinski@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
	anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Subject: Re: [PATCH iwl-next 4/7] ice: Cache perout/extts requests and check flags
Date: Mon, 1 Jul 2024 14:26:43 +0100	[thread overview]
Message-ID: <20240701132643.GB17134@kernel.org> (raw)
In-Reply-To: <20240627151127.284884-13-karol.kolacinski@intel.com>

On Thu, Jun 27, 2024 at 05:09:28PM +0200, Karol Kolacinski wrote:
> Cache original PTP GPIO requests instead of saving each parameter in
> internal structures for periodic output or external timestamp request.
> 
> Factor out all periodic output register writes from ice_ptp_cfg_clkout
> to a separate function to improve readability.
> 
> Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>

...

> diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h

...

> @@ -259,13 +246,18 @@ struct ice_ptp_pin_desc {
>   * @work: delayed work function for periodic tasks
>   * @cached_phc_time: a cached copy of the PHC time for timestamp extension
>   * @cached_phc_jiffies: jiffies when cached_phc_time was last updated
> - * @ext_ts_chan: the external timestamp channel in use
> + * @kworker: kwork thread for handling periodic work
>   * @ext_ts_irq: the external timestamp IRQ in use
>   * @pin_desc: structure defining pins
>   * @ice_pin_desc: internal structure describing pin relations
> +<<<<<<< HEAD
>   * @kworker: kwork thread for handling periodic work
>   * @perout_channels: periodic output data
>   * @extts_channels: channels for external timestamps
> +=======
> + * @perout_rqs: cached periodic output requests
> + * @extts_rqs: cached external timestamp requests
> +>>>>>>> de618462ed43 (ice: Cache perout/extts requests and check flags)
>   * @info: structure defining PTP hardware capabilities
>   * @clock: pointer to registered PTP clock device
>   * @tstamp_config: hardware timestamping configuration

I think something went wrong when resolving a merge at some point :)

...

  reply	other threads:[~2024-07-01 13:26 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-27 15:09 [PATCH iwl-next 0/7] ice: Cleanup and refactor PTP pin handling Karol Kolacinski
2024-06-27 15:09 ` [PATCH iwl-next 1/7] ice: Implement ice_ptp_pin_desc Karol Kolacinski
2024-07-01 13:23   ` Simon Horman
2024-06-27 15:09 ` [PATCH iwl-next 2/7] ice: Add SDPs support for E825C Karol Kolacinski
2024-07-01 13:25   ` Simon Horman
2024-06-27 15:09 ` [PATCH iwl-next 3/7] ice: Align E810T GPIO to other products Karol Kolacinski
2024-07-01 13:25   ` Simon Horman
2024-06-27 15:09 ` [PATCH iwl-next 4/7] ice: Cache perout/extts requests and check flags Karol Kolacinski
2024-07-01 13:26   ` Simon Horman [this message]
2024-06-27 15:09 ` [PATCH iwl-next 5/7] ice: Disable shared pin on E810 on setfunc Karol Kolacinski
2024-07-01 13:27   ` Simon Horman
2024-06-27 15:09 ` [PATCH iwl-next 6/7] ice: Read SDP section from NVM for pin definitions Karol Kolacinski
2024-06-27 15:09 ` [PATCH iwl-next 7/7] ice: Enable 1PPS out from CGU for E825C products Karol Kolacinski
2024-06-27 15:37   ` [Intel-wired-lan] " Paul Menzel
2024-07-01 13:49     ` Kolacinski, Karol
2024-07-01 13:27   ` Simon Horman
2024-07-01 15:08     ` Przemek Kitszel
2024-07-02 10:56       ` Simon Horman

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