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AJvYcCXUFXCFasujHLKf8eAn6zd+Dk3V2E08qIlvt/UFv1MuVmb9daAPUrlVqFi2zRL3tE7ePw/JksKDG0UdxWyZyePeTsoRe/54 X-Gm-Message-State: AOJu0Yyzr14nEX5cwS5fNZRU+RSjVSaM/jdMBZT/aBXod2XElFYEwaJS 96YtPdUZNhUm3sdELBFqlmXBvkPZTeSD6wM3WImSjKnxo/gJYRMxyaehIOutow== X-Google-Smtp-Source: AGHT+IHqEnHI7Rj1hL7gUGi81gJe1aYQUJCuyxycj4mUXdiddpUKauXt0eXIlBtc37Zl8NAwCjn/2w== X-Received: by 2002:a17:90b:1fcf:b0:2c8:b576:2b7e with SMTP id 98e67ed59e1d1-2c93d771fa4mr6663084a91.46.1720014275964; Wed, 03 Jul 2024 06:44:35 -0700 (PDT) Received: from thinkpad ([220.158.156.98]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c91ce72abdsm10650855a91.32.2024.07.03.06.44.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jul 2024 06:44:35 -0700 (PDT) Date: Wed, 3 Jul 2024 19:14:30 +0530 From: Manivannan Sadhasivam To: Slark Xiao Cc: loic.poulain@linaro.org, ryazanov.s.a@gmail.com, johannes@sipsolutions.net, quic_jhugo@quicinc.com, netdev@vger.kernel.org, mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 1/3] bus: mhi: host: Add Foxconn SDX72 related support Message-ID: <20240703134430.GB4342@thinkpad> References: <20240701021216.17734-1-slark_xiao@163.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240701021216.17734-1-slark_xiao@163.com> On Mon, Jul 01, 2024 at 10:12:14AM +0800, Slark Xiao wrote: > Align with Qcom SDX72, add ready timeout item for Foxconn SDX72. > And also, add firehose support since SDX72. > > Signed-off-by: Slark Xiao Applied to mhi-next with fixup to commit subject and description! - Mani > --- > v2: (1). Update the edl file path and name (2). Set SDX72 support > trigger edl mode by default > v3: Divide into 2 parts for Foxconn sdx72 platform > --- > drivers/bus/mhi/host/pci_generic.c | 43 ++++++++++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > > diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c > index 35ae7cd0711f..1fb1c2f2fe12 100644 > --- a/drivers/bus/mhi/host/pci_generic.c > +++ b/drivers/bus/mhi/host/pci_generic.c > @@ -399,6 +399,8 @@ static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { > MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0), > MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0), > MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0), > + MHI_CHANNEL_CONFIG_UL_FP(34, "FIREHOSE", 32, 0), > + MHI_CHANNEL_CONFIG_DL_FP(35, "FIREHOSE", 32, 0), > MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2), > MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3), > }; > @@ -419,6 +421,16 @@ static const struct mhi_controller_config modem_foxconn_sdx55_config = { > .event_cfg = mhi_foxconn_sdx55_events, > }; > > +static const struct mhi_controller_config modem_foxconn_sdx72_config = { > + .max_channels = 128, > + .timeout_ms = 20000, > + .ready_timeout_ms = 50000, > + .num_channels = ARRAY_SIZE(mhi_foxconn_sdx55_channels), > + .ch_cfg = mhi_foxconn_sdx55_channels, > + .num_events = ARRAY_SIZE(mhi_foxconn_sdx55_events), > + .event_cfg = mhi_foxconn_sdx55_events, > +}; > + > static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = { > .name = "foxconn-sdx55", > .fw = "qcom/sdx55m/sbl1.mbn", > @@ -488,6 +500,28 @@ static const struct mhi_pci_dev_info mhi_foxconn_dw5932e_info = { > .sideband_wake = false, > }; > > +static const struct mhi_pci_dev_info mhi_foxconn_t99w515_info = { > + .name = "foxconn-t99w515", > + .edl = "fox/sdx72m/edl.mbn", > + .edl_trigger = true, > + .config = &modem_foxconn_sdx72_config, > + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, > + .dma_data_width = 32, > + .mru_default = 32768, > + .sideband_wake = false, > +}; > + > +static const struct mhi_pci_dev_info mhi_foxconn_dw5934e_info = { > + .name = "foxconn-dw5934e", > + .edl = "fox/sdx72m/edl.mbn", > + .edl_trigger = true, > + .config = &modem_foxconn_sdx72_config, > + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, > + .dma_data_width = 32, > + .mru_default = 32768, > + .sideband_wake = false, > +}; > + > static const struct mhi_channel_config mhi_mv3x_channels[] = { > MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 64, 0), > MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 64, 0), > @@ -720,6 +754,15 @@ static const struct pci_device_id mhi_pci_id_table[] = { > /* DW5932e (sdx62), Non-eSIM */ > { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0f9), > .driver_data = (kernel_ulong_t) &mhi_foxconn_dw5932e_info }, > + /* T99W515 (sdx72) */ > + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe118), > + .driver_data = (kernel_ulong_t) &mhi_foxconn_t99w515_info }, > + /* DW5934e(sdx72), With eSIM */ > + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe11d), > + .driver_data = (kernel_ulong_t) &mhi_foxconn_dw5934e_info }, > + /* DW5934e(sdx72), Non-eSIM */ > + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe11e), > + .driver_data = (kernel_ulong_t) &mhi_foxconn_dw5934e_info }, > /* MV31-W (Cinterion) */ > { PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00b3), > .driver_data = (kernel_ulong_t) &mhi_mv31_info }, > -- > 2.25.1 > -- மணிவண்ணன் சதாசிவம்