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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org Subject: Re: [PATCH net v2 1/2] net: dsa: mv88e6xxx: Limit chip-wide frame size config to CPU ports Message-ID: <20240717114600.a3dprto55puhfpjg@skbuf> References: <20240717090820.894234-1-martin@strongswan.org> <20240717090820.894234-2-martin@strongswan.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240717090820.894234-2-martin@strongswan.org> On Wed, Jul 17, 2024 at 11:08:19AM +0200, Martin Willi wrote: > Marvell chips not supporting per-port jumbo frame size configurations use > a chip-wide frame size configuration. In the commit referenced with the > Fixes tag, the setting is applied just for the last port changing its MTU. > > While configuring CPU ports accounts for tagger overhead, user ports do > not. When setting the MTU for a user port, the chip-wide setting is > reduced to not include the tagger overhead, resulting in an potentially > insufficient maximum frame size for the CPU port. Specifically, sending > full-size frames from the CPU port on a MV88E6097 having a user port MTU > of 1500 bytes results in dropped frames. > > As, by design, the CPU port MTU is adjusted for any user port change, > apply the chip-wide setting only for CPU ports. > > Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU") > Suggested-by: Vladimir Oltean > Signed-off-by: Martin Willi > --- Reviewed-by: Vladimir Oltean