[PATCH net-next] net: airoha: Fix typo in REG_CDM2_FWD_CFG configuration

[PATCH net-next] net: airoha: Fix typo in REG_CDM2_FWD_CFG configuration

[Lorenzo Bianconi]

Fix typo in airoha_fe_init routine configuring CDM2_OAM_QSEL_MASK field
of REG_CDM2_FWD_CFG register.
This bug is not introducing any user visible problem since Frame Engine
CDM2 port is used just by the second QDMA block and we currently enable
just QDMA1 block connected to the MT7530 dsa switch via CDM1 port.

Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet
support for EN7581 SoC")

Reported-by: ChihWei Cheng <chihwei.cheng@airoha.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
 drivers/net/ethernet/mediatek/airoha_eth.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/mediatek/airoha_eth.c b/drivers/net/ethernet/mediatek/airoha_eth.c
index e037f725f6d3505a8b91815ae26322f5d1b8590c..45665a5b14f5c646d23aaf4830e55a118e9f1a8a 100644
--- a/drivers/net/ethernet/mediatek/airoha_eth.c
+++ b/drivers/net/ethernet/mediatek/airoha_eth.c
@@ -1371,7 +1371,8 @@ static int airoha_fe_init(struct airoha_eth *eth)
 	airoha_fe_set(eth, REG_GDM_MISC_CFG,
 		      GDM2_RDM_ACK_WAIT_PREF_MASK |
 		      GDM2_CHN_VLD_MODE_MASK);
-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK, 15);
+	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK,
+		      FIELD_PREP(CDM2_OAM_QSEL_MASK, 15));
 
 	/* init fragment and assemble Force Port */
 	/* NPU Core-3, NPU Bridge Channel-3 */

---
base-commit: 60b4d49b9621db4b000c9065dd6457c9a0eda80b
change-id: 20241014-airoha-eth-cdm2-fixes-92d909308204

Best regards,
-- 
Lorenzo Bianconi <lorenzo@kernel.org>

Re: [PATCH net-next] net: airoha: Fix typo in REG_CDM2_FWD_CFG configuration

[Simon Horman]

On Tue, Oct 15, 2024 at 09:58:09AM +0200, Lorenzo Bianconi wrote:
> Fix typo in airoha_fe_init routine configuring CDM2_OAM_QSEL_MASK field
> of REG_CDM2_FWD_CFG register.
> This bug is not introducing any user visible problem since Frame Engine
> CDM2 port is used just by the second QDMA block and we currently enable
> just QDMA1 block connected to the MT7530 dsa switch via CDM1 port.
> 
> Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet
> support for EN7581 SoC")
> 
> Reported-by: ChihWei Cheng <chihwei.cheng@airoha.com>
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>

Reviewed-by: Simon Horman <horms@kernel.org>

> ---
>  drivers/net/ethernet/mediatek/airoha_eth.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/mediatek/airoha_eth.c b/drivers/net/ethernet/mediatek/airoha_eth.c
> index e037f725f6d3505a8b91815ae26322f5d1b8590c..45665a5b14f5c646d23aaf4830e55a118e9f1a8a 100644
> --- a/drivers/net/ethernet/mediatek/airoha_eth.c
> +++ b/drivers/net/ethernet/mediatek/airoha_eth.c
> @@ -1371,7 +1371,8 @@ static int airoha_fe_init(struct airoha_eth *eth)
>  	airoha_fe_set(eth, REG_GDM_MISC_CFG,
>  		      GDM2_RDM_ACK_WAIT_PREF_MASK |
>  		      GDM2_CHN_VLD_MODE_MASK);
> -	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK, 15);
> +	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK,
> +		      FIELD_PREP(CDM2_OAM_QSEL_MASK, 15));

I agree FIELD_PREP is correct here as it will both mask (not important
in this case) and shift (very important in this case) it's input (15).
This matches how airoha_fe_rmw() will use this argument.

>  
>  	/* init fragment and assemble Force Port */
>  	/* NPU Core-3, NPU Bridge Channel-3 */
> 
> ---
> base-commit: 60b4d49b9621db4b000c9065dd6457c9a0eda80b
> change-id: 20241014-airoha-eth-cdm2-fixes-92d909308204
> 
> Best regards,
> -- 
> Lorenzo Bianconi <lorenzo@kernel.org>
> 
> 

Re: [PATCH net-next] net: airoha: Fix typo in REG_CDM2_FWD_CFG configuration

[patchwork-bot+netdevbpf]

Hello:

This patch was applied to netdev/net-next.git (main)
by Andrew Lunn <andrew@lunn.ch>:

On Tue, 15 Oct 2024 09:58:09 +0200 you wrote:
> Fix typo in airoha_fe_init routine configuring CDM2_OAM_QSEL_MASK field
> of REG_CDM2_FWD_CFG register.
> This bug is not introducing any user visible problem since Frame Engine
> CDM2 port is used just by the second QDMA block and we currently enable
> just QDMA1 block connected to the MT7530 dsa switch via CDM1 port.
> 
> Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet
> support for EN7581 SoC")
> 
> [...]

Here is the summary with links:
  - [net-next] net: airoha: Fix typo in REG_CDM2_FWD_CFG configuration
    https://git.kernel.org/netdev/net-next/c/30d9d8f6a2d7

You are awesome, thank you!
-- 
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