From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3CCC2209B; Mon, 21 Oct 2024 19:10:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729537856; cv=none; b=uJlYMHJQpCjmJMxQ0npWNbxMmMfmzKeJlCCNFvFv/3j5hDvurk749+o14PCBbLtdxzqgQHHvyNI1LMQh10t49eGv4oGl+KYpxXDaIpK56k6ivJ7Br8vHiH99k8Zv1zA4F5Y3TqXZfB10UPIo/rohiWATuqRmCeI0ZddeiFiNI2s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729537856; c=relaxed/simple; bh=5Npb0UB3xjxu34VLa/hXfqiKXjp+NHGyBf4A2zbCrLw=; h=Date:From:To:CC:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=dAiiFFZNnMQrkQo9fr/cw3PVu7pl5NE/oeq1ykJxzgEXqrwdNhqS+pMegl8CX4f3HHXKjHzPunS+YObsvOxh85UR8YW0JgXCs+yLKRO3j7InkRgk5GwDDIIwz3wX2U/G1lu+u07VcRAwlmJR4JKiSgPu86tJkvOJpFmfjEloc6Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=sgOKrCFU; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="sgOKrCFU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1729537854; x=1761073854; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=5Npb0UB3xjxu34VLa/hXfqiKXjp+NHGyBf4A2zbCrLw=; b=sgOKrCFUFresoonOtetxw744HzBfZ5b3WY4c2cpty4SoSZmEU8cxHB6G aS2JdIP/lzgiJZLAxo2VWPk5phx9bvLOrEYvUhzVuq0bGqxjyxSIejScs Zgta4Ga5ux9hunDcQTYdXbzUPJZYdYUsnDjgLjnuVgrbRYbzVbujK87Ss YoUoKkVf0PCsmygN4UULECASK6wQ4ewWzbB3gfJ6BIvi3oG8Gykz+lyQj GExjWyt03Do8o+zgAGU4iy6wM2HW43dt70VUUHL41w+jsdPSWElcX1o80 YFatwSgBCkyNhzCMYy0GOyR37jQkt5FCLyUIekhHnJVZbujmx8T0T/GMK A==; X-CSE-ConnectionGUID: AY5F0AEfSvWQ3nuwGvWjFA== X-CSE-MsgGUID: GZEoHNsmRTe4gsUIApM8fg== X-IronPort-AV: E=Sophos;i="6.11,221,1725346800"; d="scan'208";a="36683189" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 21 Oct 2024 12:10:53 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 21 Oct 2024 12:10:32 -0700 Received: from DEN-DL-M70577 (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 21 Oct 2024 12:10:28 -0700 Date: Mon, 21 Oct 2024 19:10:27 +0000 From: Daniel Machon To: Maxime Chevallier CC: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , , Lars Povlsen , Steen Hegelund , , , , , , Richard Cochran , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , , , Subject: Re: [PATCH net-next 05/15] net: sparx5: add registers required by lan969x Message-ID: <20241021191027.wgtyhy53ect2xhko@DEN-DL-M70577> References: <20241021-sparx5-lan969x-switch-driver-2-v1-0-c8c49ef21e0f@microchip.com> <20241021-sparx5-lan969x-switch-driver-2-v1-5-c8c49ef21e0f@microchip.com> <20241021193348.7a2423db@device-21.home> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20241021193348.7a2423db@device-21.home> > Hello Daniel, > > On Mon, 21 Oct 2024 15:58:42 +0200 > Daniel Machon wrote: > > > Lan969x will require a few additional registers for certain operations. > > Some are shared, some are not. Add these. > > > > Reviewed-by: Steen Hegelund > > Signed-off-by: Daniel Machon > > [...] > > > +#define PTP_PTP_TWOSTEP_STAMP_SUBNS_STAMP_SUB_NSEC GENMASK(7, 0) > > I understand that this is partly autogenerated, however the naming for > this register in particular seems very redundant... Is there any way > this could be improved ? > > Thanks, > > Maxime > Yes, this might be a new candidate for "the longest name in the kernel" award. This particular register is a concatenation of: PTP (target) PTP_TS_FIFO (register group) PTP_TWOSTEP_STAMP_SUBNS (register) STAMP_SUB_NSEC (field), and as you can see the register group part is already removed. That said, the tool for generating this, can be tweaked to rename registers if required - I will do that here :-) Thanks! /Daniel