From: Jakub Kicinski <kuba@kernel.org>
To: Jiri Pirko <jiri@resnulli.us>
Cc: netdev@vger.kernel.org, davem@davemloft.net, edumazet@google.com,
pabeni@redhat.com, donald.hunter@gmail.com,
vadim.fedorenko@linux.dev, arkadiusz.kubalewski@intel.com,
saeedm@nvidia.com, leon@kernel.org, tariqt@nvidia.com,
maciejm@nvidia.com
Subject: Re: [PATCH net-next v3 1/2] dpll: add clock quality level attribute and op
Date: Tue, 29 Oct 2024 06:51:29 -0700 [thread overview]
Message-ID: <20241029065129.503f51cb@kernel.org> (raw)
In-Reply-To: <ZyDafILiX4bFEfBI@nanopsycho.orion>
On Tue, 29 Oct 2024 13:52:12 +0100 Jiri Pirko wrote:
> >I thought clock-id is basically clockid_t, IOW a reference.
> >I wish that the information about timekeepers was exposed
> >by the time subsystem rather than DPLL. Something like clock_getres().
>
> Hmm. From what I understand, the quality of the clock as it is defined
> by the ITU standard is an attribute of the DPLL device. DPLL device
> in our model is basically a board, which might combine oscillator,
> synchronizer and possibly other devices. The clock quality is determined
> by this combination and I understand that the ITU certification is also
> applied to this device.
>
> That's why it makes sense to have the clock quality as the DPLL
> attribute. Makes sense?
Hm, reading more carefully sounds like it's the quality of the holdover
clock. Can we say that in the documentation? "This mainly applies when
the dpll lock-status is not DPLL_LOCK_STATUS_LOCKED" is a bit of a mouthful.
I think I missed the "not" first time reading it.
Is it marked as multi-attr in case non-ITU clock quality is defined
later? Or is it legit to set to ITU bits at once?
next prev parent reply other threads:[~2024-10-29 13:51 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-14 8:11 [PATCH net-next v3 0/2] dpll: expose clock quality level Jiri Pirko
2024-10-14 8:11 ` [PATCH net-next v3 1/2] dpll: add clock quality level attribute and op Jiri Pirko
2024-10-14 8:54 ` Kubalewski, Arkadiusz
2024-10-15 14:26 ` Jakub Kicinski
2024-10-15 14:38 ` Jiri Pirko
2024-10-15 15:01 ` Jakub Kicinski
2024-10-16 8:19 ` Jiri Pirko
2024-10-18 7:07 ` Jiri Pirko
2024-10-28 17:14 ` Jakub Kicinski
2024-10-29 12:52 ` Jiri Pirko
2024-10-29 13:51 ` Jakub Kicinski [this message]
2024-10-29 14:41 ` Jiri Pirko
2024-10-16 8:21 ` Jiri Pirko
2024-10-15 14:50 ` Vadim Fedorenko
2024-10-15 14:56 ` Jiri Pirko
2024-10-15 15:01 ` Vadim Fedorenko
2024-10-16 8:17 ` Jiri Pirko
2024-10-14 8:11 ` [PATCH net-next v3 2/2] net/mlx5: DPLL, Add clock quality level op implementation Jiri Pirko
2024-10-14 8:57 ` Kubalewski, Arkadiusz
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