From: Jakub Kicinski <kuba@kernel.org>
To: Meghana Malladi <m-malladi@ti.com>
Cc: <vigneshr@ti.com>, <grygorii.strashko@ti.com>, <horms@kernel.org>,
<jan.kiszka@siemens.com>, <diogo.ivo@siemens.com>,
<pabeni@redhat.com>, <edumazet@google.com>, <davem@davemloft.net>,
<andrew+netdev@lunn.ch>, <linux-kernel@vger.kernel.org>,
<netdev@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>,
<srk@ti.com>, Roger Quadros <rogerq@kernel.org>,
<danishanwar@ti.com>,
"Vadim Fedorenko" <vadim.fedorenko@linux.dev>
Subject: Re: [PATCH net v3] net: ti: icssg-prueth: Fix 1 PPS sync
Date: Thu, 31 Oct 2024 18:59:05 -0700 [thread overview]
Message-ID: <20241031185905.610c982f@kernel.org> (raw)
In-Reply-To: <20241028111051.1546143-1-m-malladi@ti.com>
On Mon, 28 Oct 2024 16:40:52 +0530 Meghana Malladi wrote:
> The first PPS latch time needs to be calculated by the driver
> (in rounded off seconds) and configured as the start time
> offset for the cycle. After synchronizing two PTP clocks
> running as master/slave, missing this would cause master
> and slave to start immediately with some milliseconds
> drift which causes the PPS signal to never synchronize with
> the PTP master.
You're reading a 64b value in chunks, is it not possible that it'd wrap
in between reads? This can be usually detected by reading high twice and
making sure it didn't change.
Please fix or explain in the commit message why this is not a problem..
--
pw-bot: cr
next prev parent reply other threads:[~2024-11-01 1:59 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-28 11:10 [PATCH net v3] net: ti: icssg-prueth: Fix 1 PPS sync Meghana Malladi
2024-11-01 1:59 ` Jakub Kicinski [this message]
2024-11-04 11:25 ` Malladi, Meghana
2024-11-05 2:50 ` Jakub Kicinski
2024-11-05 12:01 ` Malladi, Meghana
2024-11-05 21:00 ` Andrew Lunn
2024-11-06 6:47 ` Malladi, Meghana
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