From: Zhi Wang <zhiw@nvidia.com>
To: <alejandro.lucero-palau@amd.com>
Cc: <linux-cxl@vger.kernel.org>, <netdev@vger.kernel.org>,
<dan.j.williams@intel.com>, <martin.habets@xilinx.com>,
<edward.cree@amd.com>, <davem@davemloft.net>, <kuba@kernel.org>,
<pabeni@redhat.com>, <edumazet@google.com>,
Alejandro Lucero <alucerop@amd.com>
Subject: Re: [PATCH v5 21/27] cxl/region: factor out interleave granularity setup
Date: Tue, 19 Nov 2024 22:23:01 +0200 [thread overview]
Message-ID: <20241119222301.00004269@nvidia.com> (raw)
In-Reply-To: <20241118164434.7551-22-alejandro.lucero-palau@amd.com>
On Mon, 18 Nov 2024 16:44:28 +0000
<alejandro.lucero-palau@amd.com> wrote:
LGTM. Reviewed-by: Zhi Wang <zhiw@nvidia.com>
> From: Alejandro Lucero <alucerop@amd.com>
>
> In preparation for kernel driven region creation, factor out a common
> helper from the user-sysfs region setup for interleave granularity.
>
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> Co-developed-by: Dan Williams <dan.j.williams@intel.com>
> ---
> drivers/cxl/core/region.c | 39
> +++++++++++++++++++++++---------------- 1 file changed, 23
> insertions(+), 16 deletions(-)
>
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index 04f82adb763f..6652887ea396 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -540,21 +540,14 @@ static ssize_t
> interleave_granularity_show(struct device *dev, return rc;
> }
>
> -static ssize_t interleave_granularity_store(struct device *dev,
> - struct device_attribute
> *attr,
> - const char *buf, size_t
> len) +static int set_interleave_granularity(struct cxl_region *cxlr,
> int val) {
> - struct cxl_root_decoder *cxlrd =
> to_cxl_root_decoder(dev->parent);
> + struct cxl_root_decoder *cxlrd =
> to_cxl_root_decoder(cxlr->dev.parent); struct cxl_decoder *cxld =
> &cxlrd->cxlsd.cxld;
> - struct cxl_region *cxlr = to_cxl_region(dev);
> struct cxl_region_params *p = &cxlr->params;
> - int rc, val;
> + int rc;
> u16 ig;
>
> - rc = kstrtoint(buf, 0, &val);
> - if (rc)
> - return rc;
> -
> rc = granularity_to_eig(val, &ig);
> if (rc)
> return rc;
> @@ -570,16 +563,30 @@ static ssize_t
> interleave_granularity_store(struct device *dev, if
> (cxld->interleave_ways > 1 && val != cxld->interleave_granularity)
> return -EINVAL;
> + lockdep_assert_held_write(&cxl_region_rwsem);
> + if (p->state >= CXL_CONFIG_INTERLEAVE_ACTIVE)
> + return -EBUSY;
> +
> + p->interleave_granularity = val;
> + return 0;
> +}
> +
> +static ssize_t interleave_granularity_store(struct device *dev,
> + struct device_attribute
> *attr,
> + const char *buf, size_t
> len) +{
> + struct cxl_region *cxlr = to_cxl_region(dev);
> + int rc, val;
> +
> + rc = kstrtoint(buf, 0, &val);
> + if (rc)
> + return rc;
> +
> rc = down_write_killable(&cxl_region_rwsem);
> if (rc)
> return rc;
> - if (p->state >= CXL_CONFIG_INTERLEAVE_ACTIVE) {
> - rc = -EBUSY;
> - goto out;
> - }
>
> - p->interleave_granularity = val;
> -out:
> + rc = set_interleave_granularity(cxlr, val);
> up_write(&cxl_region_rwsem);
> if (rc)
> return rc;
next prev parent reply other threads:[~2024-11-19 20:23 UTC|newest]
Thread overview: 99+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-18 16:44 [PATCH v5 00/27] cxl: add type2 device basic support alejandro.lucero-palau
2024-11-18 16:44 ` [PATCH v5 01/27] " alejandro.lucero-palau
2024-11-18 21:55 ` Dave Jiang
2024-11-20 13:40 ` Alejandro Lucero Palau
2024-11-20 23:07 ` Fan Ni
2024-11-22 4:35 ` Alison Schofield
2024-11-22 9:27 ` Alejandro Lucero Palau
2024-11-26 5:59 ` Alison Schofield
2024-11-26 16:38 ` Alejandro Lucero Palau
2024-11-22 20:43 ` Ben Cheatham
2024-11-27 9:00 ` Alejandro Lucero Palau
2024-11-27 9:07 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 02/27] sfc: add cxl support using new CXL API alejandro.lucero-palau
2024-11-22 20:43 ` Ben Cheatham
2024-11-27 9:15 ` Alejandro Lucero Palau
2024-11-26 18:08 ` Fan Ni
2024-11-27 9:17 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 03/27] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-11-18 22:52 ` Dave Jiang
2024-11-19 12:28 ` Alejandro Lucero Palau
2024-11-19 15:53 ` Dave Jiang
2024-11-20 13:41 ` Alejandro Lucero Palau
2024-11-22 20:44 ` Ben Cheatham
2024-11-18 16:44 ` [PATCH v5 04/27] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-11-22 20:44 ` Ben Cheatham
2024-11-27 11:34 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 05/27] cxl: move pci generic code alejandro.lucero-palau
2024-11-18 22:57 ` Dave Jiang
2024-11-22 20:44 ` Ben Cheatham
2024-11-18 16:44 ` [PATCH v5 06/27] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-11-18 23:32 ` Dave Jiang
2024-11-21 22:34 ` Alison Schofield
2024-11-27 11:46 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 07/27] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2024-11-18 16:44 ` [PATCH v5 08/27] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-11-22 20:45 ` Ben Cheatham
2024-11-18 16:44 ` [PATCH v5 09/27] sfc: request cxl ram resource alejandro.lucero-palau
2024-11-18 16:44 ` [PATCH v5 10/27] cxl: harden resource_contains checks to handle zero size resources alejandro.lucero-palau
2024-11-19 18:00 ` Dave Jiang
2024-11-20 13:44 ` Alejandro Lucero Palau
2024-11-19 19:50 ` Zhi Wang
2024-11-20 13:45 ` Alejandro Lucero Palau
2024-11-21 7:13 ` Zhi Wang
2024-11-21 2:46 ` Alison Schofield
2024-11-21 9:22 ` Alejandro Lucero Palau
2024-11-21 21:00 ` Alison Schofield
2024-11-27 14:56 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 11/27] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-11-19 18:12 ` Dave Jiang
2024-11-22 20:45 ` Ben Cheatham
2024-11-27 15:07 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 12/27] sfc: set cxl media ready alejandro.lucero-palau
2024-11-18 16:44 ` [PATCH v5 13/27] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2024-11-19 18:24 ` Dave Jiang
2024-11-19 20:06 ` Zhi Wang
2024-11-19 21:27 ` Dave Jiang
2024-11-20 13:57 ` Alejandro Lucero Palau
2024-11-20 17:15 ` Dave Jiang
2024-11-21 7:43 ` Zhi Wang
2024-11-22 20:45 ` Ben Cheatham
2024-11-27 16:09 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 14/27] sfc: create type2 cxl memdev alejandro.lucero-palau
2024-11-18 16:44 ` [PATCH v5 15/27] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2024-11-22 20:45 ` Ben Cheatham
2024-11-27 16:32 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 16/27] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-11-18 16:44 ` [PATCH v5 17/27] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-11-18 16:44 ` [PATCH v5 18/27] sfc: get endpoint decoder alejandro.lucero-palau
2024-11-22 20:45 ` Ben Cheatham
2024-11-27 16:47 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 19/27] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-11-19 20:16 ` Zhi Wang
2024-11-21 16:16 ` Dave Jiang
2024-11-18 16:44 ` [PATCH v5 20/27] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-11-19 20:20 ` Zhi Wang
2024-11-21 16:23 ` Dave Jiang
2024-11-18 16:44 ` [PATCH v5 21/27] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-11-19 20:23 ` Zhi Wang [this message]
2024-11-21 16:24 ` Dave Jiang
2024-11-18 16:44 ` [PATCH v5 22/27] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-11-19 20:37 ` Zhi Wang
2024-11-20 13:51 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 23/27] sfc: create cxl region alejandro.lucero-palau
2024-11-18 16:44 ` [PATCH v5 24/27] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2024-11-19 20:39 ` Zhi Wang
2024-11-20 13:55 ` Alejandro Lucero Palau
2024-11-22 20:46 ` Ben Cheatham
2024-11-27 16:59 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 25/27] sfc: specify avoid dax when cxl region is created alejandro.lucero-palau
2024-11-18 16:44 ` [PATCH v5 26/27] cxl: add function for obtaining params from a region alejandro.lucero-palau
2024-11-19 20:40 ` Zhi Wang
2024-11-21 2:56 ` Alison Schofield
2024-11-27 17:18 ` Alejandro Lucero Palau
2024-11-21 16:31 ` Dave Jiang
2024-11-27 17:12 ` Alejandro Lucero Palau
2024-11-18 16:44 ` [PATCH v5 27/27] sfc: support pio mapping based on cxl alejandro.lucero-palau
2024-11-21 3:33 ` [PATCH v5 00/27] cxl: add type2 device basic support Alison Schofield
2024-11-21 9:27 ` Alejandro Lucero Palau
2024-11-22 4:14 ` Alison Schofield
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241119222301.00004269@nvidia.com \
--to=zhiw@nvidia.com \
--cc=alejandro.lucero-palau@amd.com \
--cc=alucerop@amd.com \
--cc=dan.j.williams@intel.com \
--cc=davem@davemloft.net \
--cc=edumazet@google.com \
--cc=edward.cree@amd.com \
--cc=kuba@kernel.org \
--cc=linux-cxl@vger.kernel.org \
--cc=martin.habets@xilinx.com \
--cc=netdev@vger.kernel.org \
--cc=pabeni@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).