From: Zhiyuan Wan <kmlinuxm@gmail.com>
To: andrew@lunn.ch
Cc: kuba@kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, willy.liu@realtek.com,
Zhiyuan Wan <kmlinuxm@gmail.com>, Yuki Lee <febrieac@outlook.com>
Subject: [PATCH 2/2] net: phy: realtek: add dt property to disable broadcast PHY address
Date: Tue, 3 Dec 2024 03:50:29 +0800 [thread overview]
Message-ID: <20241202195029.2045633-2-kmlinuxm@gmail.com> (raw)
In-Reply-To: <20241202195029.2045633-1-kmlinuxm@gmail.com>
This patch add support to disable 'broadcast PHY address' feature of
RTL8211F.
This feature is enabled defaultly after a reset of this transceiver.
When this feature is enabled, the phy not only responds to the
configuration PHY address by pin states on board, but also responds
to address 0, the optional broadcast address of the MDIO bus.
But not every transceiver supports this feature, when RTL8211
shares one MDIO bus with other transceivers which doesn't support
this feature, like mt7530 switch chip (integrated in mt7621 SoC),
it usually causes address conflict, leads to the
port of RTL8211FS stops working.
This patch adds dt property `realtek,phyad0-disable` to disable
broadcast PHY address feature of this transceiver.
This patch did not change the default behavior of this driver.
Signed-off-by: Yuki Lee <febrieac@outlook.com>
Signed-off-by: Zhiyuan Wan <kmlinuxm@gmail.com>
---
drivers/net/phy/realtek.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 10a87d58c..014dd2da1 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -31,6 +31,7 @@
#define RTL8211F_PHYCR1 0x18
#define RTL8211F_PHYCR2 0x19
#define RTL8211F_INSR 0x1d
+#define RTL8211F_PHYAD0_EN BIT(13)
#define RTL8211FS_FIBER_ESR 0x0F
#define RTL8211FS_MODE_MASK 0xC000
@@ -421,12 +422,18 @@ static int rtl8211f_config_init(struct phy_device *phydev)
struct device *dev = &phydev->mdio.dev;
u16 val_txdly, val_rxdly;
int ret;
+ u16 phyad0_disable = 0;
+ if (of_property_read_bool(dev->of_node, "realtek,phyad0-disable")) {
+ phyad0_disable = RTL8211F_PHYAD0_EN;
+ dev_dbg(dev, "disabling MDIO address 0 for this phy");
+ }
ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
- RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF,
+ RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE |
+ RTL8211F_ALDPS_XTAL_OFF | phyad0_disable,
priv->phycr1);
if (ret < 0) {
- dev_err(dev, "aldps mode configuration failed: %pe\n",
+ dev_err(dev, "mode configuration failed: %pe\n",
ERR_PTR(ret));
return ret;
}
--
2.30.2
next prev parent reply other threads:[~2024-12-02 19:50 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-02 19:50 [PATCH 1/2] net: phy: realtek: add combo mode support for RTL8211FS Zhiyuan Wan
2024-12-02 19:50 ` Zhiyuan Wan [this message]
2024-12-03 0:04 ` [PATCH 2/2] net: phy: realtek: add dt property to disable broadcast PHY address Andrew Lunn
2024-12-03 3:46 ` [PATCH v2 1/2] net: phy: realtek: disable broadcast address feature of rtl8211f Zhiyuan Wan
2024-12-03 3:58 ` Andrew Lunn
2024-12-03 4:26 ` [PATCH v3 " Zhiyuan Wan
2024-12-03 6:50 ` Heiner Kallweit
2024-12-03 7:18 ` [PATCH net-next " Zhiyuan Wan
2024-12-03 7:38 ` Heiner Kallweit
2024-12-03 8:35 ` Zhiyuan Wan
2024-12-03 9:52 ` Heiner Kallweit
2024-12-02 23:52 ` [PATCH 1/2] net: phy: realtek: add combo mode support for RTL8211FS Andrew Lunn
2024-12-03 3:08 ` 万致远
2024-12-03 3:53 ` Andrew Lunn
2024-12-03 4:42 ` 万致远
2024-12-03 4:44 ` 万致远
-- strict thread matches above, loose matches on Subject: below --
2024-12-03 2:37 [PATCH 2/2] net: phy: realtek: add dt property to disable broadcast PHY address 万致远
2024-12-03 2:54 ` Andrew Lunn
2024-12-03 3:21 ` 万致远
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