From: Martin Habets <habetsm.xilinx@gmail.com>
To: alejandro.lucero-palau@amd.com
Cc: linux-cxl@vger.kernel.org, netdev@vger.kernel.org,
dan.j.williams@intel.com, martin.habets@xilinx.com,
edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
pabeni@redhat.com, edumazet@google.com, dave.jiang@intel.com,
Alejandro Lucero <alucerop@amd.com>
Subject: Re: [PATCH v6 02/28] sfc: add cxl support using new CXL API
Date: Tue, 3 Dec 2024 14:21:45 +0000 [thread overview]
Message-ID: <20241203141947.GA778635@gmail.com> (raw)
In-Reply-To: <20241202171222.62595-3-alejandro.lucero-palau@amd.com>
On Mon, Dec 02, 2024 at 05:11:56PM +0000, alejandro.lucero-palau@amd.com wrote:
>
> From: Alejandro Lucero <alucerop@amd.com>
>
> Add CXL initialization based on new CXL API for accel drivers and make
> it dependable on kernel CXL configuration.
>
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
Reviewed-by: Martin Habets <habetsm.xilinx@gmail.com>
> ---
> drivers/net/ethernet/sfc/Kconfig | 7 +++
> drivers/net/ethernet/sfc/Makefile | 1 +
> drivers/net/ethernet/sfc/efx.c | 24 +++++++-
> drivers/net/ethernet/sfc/efx_cxl.c | 87 +++++++++++++++++++++++++++
> drivers/net/ethernet/sfc/efx_cxl.h | 28 +++++++++
> drivers/net/ethernet/sfc/net_driver.h | 10 +++
> 6 files changed, 156 insertions(+), 1 deletion(-)
> create mode 100644 drivers/net/ethernet/sfc/efx_cxl.c
> create mode 100644 drivers/net/ethernet/sfc/efx_cxl.h
>
> diff --git a/drivers/net/ethernet/sfc/Kconfig b/drivers/net/ethernet/sfc/Kconfig
> index 3eb55dcfa8a6..a8bc777baa95 100644
> --- a/drivers/net/ethernet/sfc/Kconfig
> +++ b/drivers/net/ethernet/sfc/Kconfig
> @@ -65,6 +65,13 @@ config SFC_MCDI_LOGGING
> Driver-Interface) commands and responses, allowing debugging of
> driver/firmware interaction. The tracing is actually enabled by
> a sysfs file 'mcdi_logging' under the PCI device.
> +config SFC_CXL
> + bool "Solarflare SFC9100-family CXL support"
> + depends on SFC && CXL_BUS && !(SFC=y && CXL_BUS=m)
> + default y
> + help
> + This enables CXL support by the driver relying on kernel support
> + and hardware support.
>
> source "drivers/net/ethernet/sfc/falcon/Kconfig"
> source "drivers/net/ethernet/sfc/siena/Kconfig"
> diff --git a/drivers/net/ethernet/sfc/Makefile b/drivers/net/ethernet/sfc/Makefile
> index 8f446b9bd5ee..e909cafd5908 100644
> --- a/drivers/net/ethernet/sfc/Makefile
> +++ b/drivers/net/ethernet/sfc/Makefile
> @@ -13,6 +13,7 @@ sfc-$(CONFIG_SFC_SRIOV) += sriov.o ef10_sriov.o ef100_sriov.o ef100_rep.o \
> mae.o tc.o tc_bindings.o tc_counters.o \
> tc_encap_actions.o tc_conntrack.o
>
> +sfc-$(CONFIG_SFC_CXL) += efx_cxl.o
> obj-$(CONFIG_SFC) += sfc.o
>
> obj-$(CONFIG_SFC_FALCON) += falcon/
> diff --git a/drivers/net/ethernet/sfc/efx.c b/drivers/net/ethernet/sfc/efx.c
> index 650136dfc642..ef3f34f0519a 100644
> --- a/drivers/net/ethernet/sfc/efx.c
> +++ b/drivers/net/ethernet/sfc/efx.c
> @@ -34,6 +34,9 @@
> #include "selftest.h"
> #include "sriov.h"
> #include "efx_devlink.h"
> +#ifdef CONFIG_SFC_CXL
> +#include "efx_cxl.h"
> +#endif
>
> #include "mcdi_port_common.h"
> #include "mcdi_pcol.h"
> @@ -1004,12 +1007,17 @@ static void efx_pci_remove(struct pci_dev *pci_dev)
> efx_pci_remove_main(efx);
>
> efx_fini_io(efx);
> +
> + probe_data = container_of(efx, struct efx_probe_data, efx);
> +#ifdef CONFIG_SFC_CXL
> + efx_cxl_exit(probe_data);
> +#endif
> +
> pci_dbg(efx->pci_dev, "shutdown successful\n");
>
> efx_fini_devlink_and_unlock(efx);
> efx_fini_struct(efx);
> free_netdev(efx->net_dev);
> - probe_data = container_of(efx, struct efx_probe_data, efx);
> kfree(probe_data);
> };
>
> @@ -1214,6 +1222,17 @@ static int efx_pci_probe(struct pci_dev *pci_dev,
> if (rc)
> goto fail2;
>
> +#ifdef CONFIG_SFC_CXL
> + /* A successful cxl initialization implies a CXL region created to be
> + * used for PIO buffers. If there is no CXL support, or initialization
> + * fails, efx_cxl_pio_initialised wll be false and legacy PIO buffers
> + * defined at specific PCI BAR regions will be used.
> + */
> + rc = efx_cxl_init(probe_data);
> + if (rc)
> + pci_err(pci_dev, "CXL initialization failed with error %d\n", rc);
> +
> +#endif
> rc = efx_pci_probe_post_io(efx);
> if (rc) {
> /* On failure, retry once immediately.
> @@ -1485,3 +1504,6 @@ MODULE_AUTHOR("Solarflare Communications and "
> MODULE_DESCRIPTION("Solarflare network driver");
> MODULE_LICENSE("GPL");
> MODULE_DEVICE_TABLE(pci, efx_pci_table);
> +#ifdef CONFIG_SFC_CXL
> +MODULE_SOFTDEP("pre: cxl_core cxl_port cxl_acpi cxl-mem");
> +#endif
> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
> new file mode 100644
> index 000000000000..9cfb519e569f
> --- /dev/null
> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
> @@ -0,0 +1,87 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/****************************************************************************
> + *
> + * Driver for AMD network controllers and boards
> + * Copyright (C) 2024, Advanced Micro Devices, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published
> + * by the Free Software Foundation, incorporated herein by reference.
> + */
> +
> +#include <cxl/cxl.h>
> +#include <cxl/pci.h>
> +#include <linux/pci.h>
> +
> +#include "net_driver.h"
> +#include "efx_cxl.h"
> +
> +#define EFX_CTPIO_BUFFER_SIZE SZ_256M
> +
> +int efx_cxl_init(struct efx_probe_data *probe_data)
> +{
> + struct efx_nic *efx = &probe_data->efx;
> + struct pci_dev *pci_dev;
> + struct efx_cxl *cxl;
> + struct resource res;
> + u16 dvsec;
> + int rc;
> +
> + pci_dev = efx->pci_dev;
> + probe_data->cxl_pio_initialised = false;
> +
> + dvsec = pci_find_dvsec_capability(pci_dev, PCI_VENDOR_ID_CXL,
> + CXL_DVSEC_PCIE_DEVICE);
> + if (!dvsec)
> + return 0;
> +
> + pci_dbg(pci_dev, "CXL_DVSEC_PCIE_DEVICE capability found\n");
> +
> + cxl = kzalloc(sizeof(*cxl), GFP_KERNEL);
> + if (!cxl)
> + return -ENOMEM;
> +
> + cxl->cxlds = cxl_accel_state_create(&pci_dev->dev);
> + if (IS_ERR(cxl->cxlds)) {
> + pci_err(pci_dev, "CXL accel device state failed");
> + rc = -ENOMEM;
> + goto err1;
> + }
> +
> + cxl_set_dvsec(cxl->cxlds, dvsec);
> + cxl_set_serial(cxl->cxlds, pci_dev->dev.id);
> +
> + res = DEFINE_RES_MEM(0, EFX_CTPIO_BUFFER_SIZE);
> + if (cxl_set_resource(cxl->cxlds, res, CXL_RES_DPA)) {
> + pci_err(pci_dev, "cxl_set_resource DPA failed\n");
> + rc = -EINVAL;
> + goto err2;
> + }
> +
> + res = DEFINE_RES_MEM_NAMED(0, EFX_CTPIO_BUFFER_SIZE, "ram");
> + if (cxl_set_resource(cxl->cxlds, res, CXL_RES_RAM)) {
> + pci_err(pci_dev, "cxl_set_resource RAM failed\n");
> + rc = -EINVAL;
> + goto err2;
> + }
> +
> + probe_data->cxl = cxl;
> +
> + return 0;
> +
> +err2:
> + kfree(cxl->cxlds);
> +err1:
> + kfree(cxl);
> + return rc;
> +}
> +
> +void efx_cxl_exit(struct efx_probe_data *probe_data)
> +{
> + if (probe_data->cxl) {
> + kfree(probe_data->cxl->cxlds);
> + kfree(probe_data->cxl);
> + }
> +}
> +
> +MODULE_IMPORT_NS(CXL);
> diff --git a/drivers/net/ethernet/sfc/efx_cxl.h b/drivers/net/ethernet/sfc/efx_cxl.h
> new file mode 100644
> index 000000000000..90fa46bc94db
> --- /dev/null
> +++ b/drivers/net/ethernet/sfc/efx_cxl.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/****************************************************************************
> + * Driver for AMD network controllers and boards
> + * Copyright (C) 2024, Advanced Micro Devices, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published
> + * by the Free Software Foundation, incorporated herein by reference.
> + */
> +
> +#ifndef EFX_CXL_H
> +#define EFX_CXL_H
> +
> +struct efx_nic;
> +
> +struct efx_cxl {
> + struct cxl_dev_state *cxlds;
> + struct cxl_memdev *cxlmd;
> + struct cxl_root_decoder *cxlrd;
> + struct cxl_port *endpoint;
> + struct cxl_endpoint_decoder *cxled;
> + struct cxl_region *efx_region;
> + void __iomem *ctpio_cxl;
> +};
> +
> +int efx_cxl_init(struct efx_probe_data *probe_data);
> +void efx_cxl_exit(struct efx_probe_data *probe_data);
> +#endif
> diff --git a/drivers/net/ethernet/sfc/net_driver.h b/drivers/net/ethernet/sfc/net_driver.h
> index 620ba6ef3514..7f11ff200c25 100644
> --- a/drivers/net/ethernet/sfc/net_driver.h
> +++ b/drivers/net/ethernet/sfc/net_driver.h
> @@ -1199,14 +1199,24 @@ struct efx_nic {
> atomic_t n_rx_noskb_drops;
> };
>
> +#ifdef CONFIG_SFC_CXL
> +struct efx_cxl;
> +#endif
> +
> /**
> * struct efx_probe_data - State after hardware probe
> * @pci_dev: The PCI device
> * @efx: Efx NIC details
> + * @cxl: details of related cxl objects
> + * @cxl_pio_initialised: cxl initialization outcome.
> */
> struct efx_probe_data {
> struct pci_dev *pci_dev;
> struct efx_nic efx;
> +#ifdef CONFIG_SFC_CXL
> + struct efx_cxl *cxl;
> + bool cxl_pio_initialised;
> +#endif
> };
>
> static inline struct efx_nic *efx_netdev_priv(struct net_device *dev)
> --
> 2.17.1
>
>
next prev parent reply other threads:[~2024-12-03 14:21 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-02 17:11 [PATCH v6 00/28] cxl: add type2 device basic support alejandro.lucero-palau
2024-12-02 17:11 ` [PATCH v6 01/28] " alejandro.lucero-palau
2024-12-02 17:11 ` [PATCH v6 02/28] sfc: add cxl support using new CXL API alejandro.lucero-palau
2024-12-03 14:21 ` Martin Habets [this message]
2024-12-03 20:33 ` Edward Cree
2024-12-04 9:30 ` Alejandro Lucero Palau
2024-12-02 17:11 ` [PATCH v6 03/28] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-12-03 4:50 ` kernel test robot
2024-12-03 22:24 ` Fan Ni
2024-12-02 17:11 ` [PATCH v6 04/28] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-12-03 18:37 ` Zhi Wang
2024-12-03 18:55 ` Alejandro Lucero Palau
2024-12-03 22:55 ` Fan Ni
2024-12-04 8:58 ` Alejandro Lucero Palau
2024-12-02 17:11 ` [PATCH v6 05/28] cxl: move pci generic code alejandro.lucero-palau
2024-12-03 22:59 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 06/28] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-12-04 2:27 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 07/28] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2024-12-03 14:24 ` Martin Habets
2024-12-03 18:41 ` Zhi Wang
2024-12-02 17:12 ` [PATCH v6 08/28] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-12-03 18:42 ` Zhi Wang
2024-12-06 3:35 ` Fan Ni
2024-12-06 4:00 ` Kalesh Anakkur Purayil
2024-12-09 9:07 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 09/28] sfc: request cxl ram resource alejandro.lucero-palau
2024-12-03 14:25 ` Martin Habets
2024-12-06 4:10 ` Fan Ni
2024-12-06 4:28 ` Kalesh Anakkur Purayil
2024-12-09 9:12 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 10/28] cxl: harden resource_contains checks to handle zero size resources alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 11/28] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 12/28] sfc: set cxl media ready alejandro.lucero-palau
2024-12-03 14:26 ` Martin Habets
2024-12-02 17:12 ` [PATCH v6 13/28] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2024-12-06 16:56 ` Fan Ni
2024-12-09 9:14 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 14/28] sfc: create type2 cxl memdev alejandro.lucero-palau
2024-12-03 14:27 ` Martin Habets
2024-12-06 17:12 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 15/28] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2024-12-03 9:44 ` kernel test robot
2024-12-06 19:48 ` Fan Ni
2024-12-09 9:22 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 16/28] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-12-03 2:34 ` kernel test robot
2024-12-03 14:34 ` Martin Habets
2024-12-03 15:24 ` Alejandro Lucero Palau
2024-12-06 21:36 ` Fan Ni
2024-12-09 9:24 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 17/28] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 18/28] sfc: get endpoint decoder alejandro.lucero-palau
2024-12-03 14:35 ` Martin Habets
2024-12-09 17:39 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 19/28] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-12-09 18:03 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 20/28] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 21/28] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 22/28] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 23/28] sfc: create cxl region alejandro.lucero-palau
2024-12-03 14:37 ` Martin Habets
2024-12-03 15:25 ` Alejandro Lucero Palau
2024-12-04 8:33 ` Martin Habets
2024-12-02 17:12 ` [PATCH v6 24/28] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2024-12-03 18:50 ` Zhi Wang
2024-12-02 17:12 ` [PATCH v6 25/28] sfc: specify no dax when cxl region is created alejandro.lucero-palau
2024-12-03 14:38 ` Martin Habets
2024-12-02 17:12 ` [PATCH v6 26/28] cxl: add function for obtaining region range alejandro.lucero-palau
2024-12-03 18:53 ` Zhi Wang
2024-12-09 9:48 ` Alejandro Lucero Palau
2024-12-09 16:29 ` Zhi Wang
2024-12-09 17:47 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 27/28] sfc: update MCDI protocol headers alejandro.lucero-palau
2024-12-03 14:41 ` Martin Habets
2024-12-03 17:38 ` Edward Cree
2024-12-02 17:12 ` [PATCH v6 28/28] sfc: support pio mapping based on cxl alejandro.lucero-palau
2024-12-03 14:52 ` Martin Habets
2024-12-03 15:30 ` Alejandro Lucero Palau
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