Re: [PATCH net v2] net: dsa: microchip: KSZ9896 register regmap alignment to 32 bit boundaries

[Simon Horman <horms@kernel.org>]

On Sat, Dec 07, 2024 at 11:59:06PM +0100, Jesse Van Gavere wrote:
> Commit 8d7ae22ae9f8 ("net: dsa: microchip: KSZ9477 register regmap alignment
> to 32 bit boundaries") fixed an issue whereby regmap_reg_range did not allow
> writes as 32 bit words to KSZ9477 PHY registers, this fix for KSZ9896 is
> adapted from there as the same errata is present in KSZ9896C as
> "Module 5: Certain PHY registers must be written as pairs instead of singly"
> the explanation below is likewise taken from this commit.
> 
> Fixes: 5c844d57aa78 ("net: dsa: microchip: fix writes to phy registers >= 0x10")

Hi Jesse,

Sorry to nit-pick but the Fixes tag should be placed along with other tags
at the bottom of the commit description. In this case exactly
above your Signed-off-by line - no blank line in between.

> 
> The commit provided code
> to apply "Module 6: Certain PHY registers must be written as pairs instead
> of singly" errata for KSZ9477 as this chip for certain PHY registers
> (0xN120 to 0xN13F, N=1,2,3,4,5) must be accessed as 32 bit words instead
> of 16 or 8 bit access.
> Otherwise, adjacent registers (no matter if reserved or not) are
> overwritten with 0x0.
> 
> Without this patch some registers (e.g. 0x113c or 0x1134) required for 32
> bit access are out of valid regmap ranges.
> 
> As a result, following error is observed and KSZ9896 is not properly
> configured:
> 
> ksz-switch spi1.0: can't rmw 32bit reg 0x113c: -EIO
> ksz-switch spi1.0: can't rmw 32bit reg 0x1134: -EIO
> ksz-switch spi1.0 lan1 (uninitialized): failed to connect to PHY: -EIO
> ksz-switch spi1.0 lan1 (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 0
> 
> The solution is to modify regmap_reg_range to allow accesses with 4 bytes
> boundaries.
> 
> Signed-off-by: Jesse Van Gavere <jesse.vangavere@scioteq.com>

...