From: Jakub Kicinski <kuba@kernel.org>
To: Furong Xu <0x1207@gmail.com>
Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Paolo Abeni <pabeni@redhat.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
xfr@outlook.com
Subject: Re: [PATCH net-next v1] net: stmmac: TSO: Simplify the code flow of DMA descriptor allocations
Date: Wed, 18 Dec 2024 17:19:16 -0800 [thread overview]
Message-ID: <20241218171916.24a7e24f@kernel.org> (raw)
In-Reply-To: <20241213030006.337695-1-0x1207@gmail.com>
On Fri, 13 Dec 2024 11:00:06 +0800 Furong Xu wrote:
> - if (priv->dma_cap.addr64 <= 32)
> - desc->des0 = cpu_to_le32(curr_addr);
> - else
> - stmmac_set_desc_addr(priv, desc, curr_addr);
> -
> + stmmac_set_desc_addr(priv, desc, curr_addr);
I can't figure out if this is correct or not in a reasonable amount of
time. dwmac4 and dwxgmac2 looks pretty obviously okay. But there are
also ndesc and enh, which don't seem to map to platform in an obvious
way to an outside reviewer.
Please provide more context/guidance in the commit message, otherwise
this looks like a high risk refactoring for a driver this poorly
designed.
--
pw-bot: cr
prev parent reply other threads:[~2024-12-19 1:19 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-13 3:00 [PATCH net-next v1] net: stmmac: TSO: Simplify the code flow of DMA descriptor allocations Furong Xu
2024-12-17 9:30 ` Paolo Abeni
2024-12-17 11:54 ` Furong Xu
2024-12-18 11:37 ` Furong Xu
2024-12-19 1:19 ` Jakub Kicinski [this message]
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